Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
Reexamination Certificate
2008-03-11
2008-03-11
Chung, Phung M. (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error/fault detection technique
C714S724000, C714S736000, C714S738000
Reexamination Certificate
active
10549118
ABSTRACT:
For detecting a failure of a logic circuit11provided in a semiconductor integrated circuit due to deterioration with age, or the like, there is provided a reference-producing circuit12using a logic different from the logic of the logic circuit11. The reference-producing circuit12produces an abnormal
ormal determination reference S for a predetermined output signal out output from the logic circuit11. The reference-producing circuit12is made from only a portion of the logic of the logic circuit11or with a logic totally different from the logic of the logic circuit11to produce the determination reference S, so that the circuit scale of the reference-producing circuit12is smaller than that of the logic circuit11. The determination reference S from the reference-producing circuit12and the output signal out from the logic circuit11are compared with each other by a determination circuit13.
REFERENCES:
patent: 6119250 (2000-09-01), Nishimura et al.
patent: 7093143 (2006-08-01), Ito et al.
patent: 2003/0237036 (2003-12-01), Kimura
patent: 11-305991 (1999-11-01), None
Aiba Kimihiko
Mae Yoichiro
Yoshida Hisato
Chung Phung M.
Matsushita Electric - Industrial Co., Ltd.
McDermott Will & Emery LLP
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