Semiconductor integrated circuit and semiconductor device...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral adapting

Reexamination Certificate

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C710S005000, C326S062000

Reexamination Certificate

active

07849237

ABSTRACT:
An interconnect configuration technology of making an access from an IP mounted on a semiconductor chip to an IP mounted on another semiconductor chip by transmitting and receiving a packet transferred through an interconnect built in a semiconductor chip among the chips using the 3D coupling technology. The device according to the technology has an initiator for transmitting an access request, a target for receiving the access request and transmitting an access response, a router for relaying the access request and the access response, and a 3D coupling circuit (three-dimensional transceiver) for performing communication with the outside, wherein the 3D coupling circuit is disposed adjacent to the router.

REFERENCES:
patent: 5629838 (1997-05-01), Knight et al.
patent: 6826191 (2004-11-01), Jones et al.
patent: 2006/0176676 (2006-08-01), Kuroda et al.
patent: 2006/0256964 (2006-11-01), Gu et al.
patent: 2007/0274198 (2007-11-01), Kuroda et al.
patent: 2003198356 (2003-07-01), None
patent: 2004-253816 (2004-09-01), None
patent: 2006-66454 (2006-03-01), None
Alam et al., Circuit Technique for Transferring Signals through Inter-Strata Connections in 3D IC Technology, Jul. 7, 2006, IBM Technical Disclosure Bulletin, pp. 1-6.

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