Semiconductor integrated circuit and manufacturing method...

Details Semiconductor integrated circuit and manufacturing method... Semiconductor integrated circuit and manufacturing method...

2002-03-11

2004-08-24

Tan, Vibol (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S086000, C326S090000, C327S108000

Reexamination Certificate

active

06781404

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor integrated circuit and more particularly to a semiconductor integrated circuit for quickly processing broadband data signals, and a manufacturing method such a semiconductor integrated circuit.
RELATED PRIOR ART
Recently, as a highly information signal processing has been demanded, an IC (integrated circuit) capable of processing signals at high speed has been needed. In order to realize a higher speed operation of ICs, in order to realize high integration transistors used the ICs, they have been formulated in highly performance quality and advanced by shortening interconnect lengths to reduce interconnect delay time of the ICs.
High performance of an element can be obtained by basically reducing the size of the element. For example, in the case of a field effect transistor, by reducing a gate length, and in the case of a bipolar transistor, by reducing a base thickness and an emitter width, a current gain cut-off frequency is improved and by reducing peripheral parts, a parasitic capacitance is reduced, thereby realizing more powerful transistors.
As the transistors have been miniaturized and high performed, there is a problem with a parasitic capacitance of the interconnect within a chip arises, and thus a possibly short distance layout between elements by a micro-manufacturing and high integration using multi-layered interconnect have been proposed.
In
FIG. 1
, there is shown a conventional emitter coupled logic (ECL) circuit as a fundamental logic circuit using bipolar transistors. This ECL circuit comprises a current switch circuit (differential circuit) and an emitter follower circuit.
The current switch circuit is a circuit that emitters of a pair of driving transistors
603
and
604
are connected in common. Both of the emitters of the driving transistors
603
and
604
are connected to a collector of constant current source transistor
607
in common. Collectors of the transistors
603
and
604
are connected in common to a connection line via a pair of load resistors
605
and
606
, respectively and a high level power supply terminal
608
is coupled to the connection line.
The emitter follower circuit comprises a pair of input transistors
612
and
613
and a pair of load resistors
614
and
615
. The bases of the two input transistors
612
and
613
are connected to the collectors of the two drive transistors
603
and
604
, respectively. The emitters of the two input transistors
612
and
613
are commonly linked to the emitter of the constant current source transistor
607
via the respective load resistors
614
and
615
and a connection line and this connection line is coupled to a low power supply terminal
609
. The collectors of the two input transistors
612
and
613
are connected in common to the connection line coupled to the high level power supply terminal
608
. Two output terminals
616
and
617
of the ELC circuit are connected to the respective connection lines connecting the emitters of the input transistors
612
and
613
and the load resistors
614
and
615
, respectively.
In this ECL circuit, with high performance of each transistor, the high integration is realized by shortening the interconnect between the current switch circuit and the emitter follower circuit and the interconnect within these two circuits in order to reduce interconnect delay time are shortened to intend the high integration. As a result, the high speed operation of the ECL circuit can be realized.
In recent years, a signal speed of the data to be used has become a high frequency such as GHz order and in such a high frequency band, the influence of the high frequency has not been considered up to this time but cannot become ignored even in the shortened interconnect, interconnect length of several tens of &mgr;m to several hundreds of &mgr;m. For example, in a distribution constant model of interconnect, propagation time &tgr; (sec/m) is expressed as follows;
&tgr;={square root over ( )}LC
(=(
LC
)
1/2
)
In this formula, L is inductance of interconnect and C is capacitance of the interconnect. From this formula, it is found that with the rise of the data signal speed such as GHz order (or about 1 GHz or more), it is necessary to reduce the values of L and C. Furthermore, when the load capacitance of the interconnect increases, the rising of the data signal is delayed, which leads to problem of the delay and the inability of the signal propagation.
In order to reduce the delay time, a circuit using air-bridge interconnect having a low parasitic capacitance is known. However, owing to an inductor component of the interconnect, distortion occurs in the data signal even within the circuit. As one example, in
FIG. 2
, there is shown a two-stage ECL circuit constituting two current switch circuits and four emitter follower circuits.
In
FIG. 2
, the two-stage ECL circuit includes the first ECL circuit having two inputs and outputs shown in FIG.
1
and the second ECL circuit having a similar construction to the first ECL circuit. The outputs of the first ECL circuit are input to the second ECL circuit via two interconnects
638
and
639
. In the first ECL circuit shown in
FIG. 2
, the same members as those shown in
FIG. 1
are designated by the same numerals and thus the explanation thereof can be omitted.
The second ECL circuit includes one current switch circuit and one emitter follower circuit in the same manner as the first ECL circuit. In this case, the emitter follower circuit of the first ECL circuit is called the first stage emitter follower circuit and the emitter follower circuit of the second ECL circuit is the second stage emitter follower circuit.
In the second stage emitter follower circuit includes a pair of input transistors
616
and
617
and a pair of load resistors
618
and
619
. More specifically, the base of the input transistor
616
is coupled to the connection line connecting the emitter of the input transistor
612
of the first emitter follower circuit and the load resistor
614
via the interconnect
638
, and the base of the input transistor
617
is coupled with to the connection line connecting the emitter of the input transistor
613
of the first emitter follower circuit and the load resistor
615
via the interconnect
639
. The emitters of the two input transistors
616
and
617
are connected in common to a connection line via the respective load resistors
618
and
619
, and this connection line is coupled to the low level power supply terminal
609
. The collectors of the two input transistors
618
and
619
are connected in common to a connection line to which the high level power supply terminal
608
is coupled.
The current switch circuit of the second stage ECL circuit, in the same manner as the first ECL circuit, includes a pair of drive transistors
623
and
624
, a constant current source transistor
627
and a pair of load resistors
625
and
626
. The emitters of the two drive transistors
623
and
624
are commonly coupled with the collector of the constant current source transistor
627
. The base of the drive transistor
623
is connected to the connection line connecting the emitter of the input transistor
616
and the load resistor
618
, and the base of the drive transistor
624
is connected to the connection line connecting the emitter of the input transistor
617
and the load resistor
619
. The collectors of the two drive transistors
623
and
624
are connected in common to the connection line via the respective load resistors
625
and
626
, and this connection line is coupled to the high level power supply terminal
608
. The emitter of the constant current source transistor
627
is linked to the connection line to which the low level power supply terminal
609
is coupled.
In the two stage ECL circuit, like the ECL circuit shown in
FIG. 1
, the current switch circuit and the emitter follower circuit are connected by the interconnect and the transistors and the resistors within the circuits are co

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