Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2008-07-30
2011-11-15
Bonzo, Bryce P (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S039000, C714S040000, C714S041000, C717S128000, C717S130000, C717S133000
Reexamination Certificate
active
08060790
ABSTRACT:
This invention is to provide a technology for taking out trace information externally without lacking under the condition of limited output bandwidth. A semiconductor integrated circuit provided includes: a processing unit which can perform arithmetic processing according to a predetermined program and can output trace information with respect to the arithmetic processing; and a trace compression unit which can compress the trace information outputted from the processing unit. The trace compression unit includes a storage device, a comparator unit which can compare trace information stored in the storage device and the trace information newly outputted from the processing unit, and a trace information compression controller which can compress trace information to be externally outputted, based on the comparison result of the comparator unit. When a content of the trace information is in agreement with that of the trace information already outputted, information indicating the already-outputted trace information is outputted, accordingly the trace information is compressed.
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Milenkovic, “Exploiting Streams in Instruction and Data Address Trace Compression” Mar. 2003, IEEE, pp. 1-9.
Kato Naoki
Sakiyama Jun
Arcos Jeison C
Bonzo Bryce P
Miles & Stockbridge P.C.
Renesas Electronics Corporation
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