Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2001-04-13
2003-10-07
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S033000, C327S108000, C710S302000
Reexamination Certificate
active
06630845
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
Not applicable.
STATEMENT REGARDING FEDERALLY SPONSORED RESEARCH
Not applicable.
FIELD OF THE INVENTION
The present invention relates generally to semiconductor integrated circuit devices, and more particularly to a semiconductor integrated circuit device for input logic-state control following power-up.
BACKGROUND OF THE INVENTION
Recently, the data communications industry has embraced a new application known as “Hot Swap”. As part of this application, a circuit board that has at least one data communications transceiver is plugged into or removed from a powered or hot back plane. The powered back plane is a large circuit board with multiple elongated, rectangular sockets. Each socket receives the edge of a smaller circuit board which is to be plugged into the back plane. When a smaller circuit board is plugged into the socket, the smaller circuit board is physically held perpendicular to the back plane by the socket. The socket provides the electrical connection between the circuit board and the back plane. Thus, all power supply and electrical signal connections are provided by the socket. The terms “powered” or “hot” back plane imply that the circuit boards are inserted and removed from the back plane while power supply lines are at their operating voltages and signal lines are active which means that they are switching between their normal signal levels. Thus, during system maintenance or reconfiguration, the system remains functional and only partially degraded.
The data communication transceiver has a logic interface and a data interface. The data interface is connected to a data cable for transmitting and receiving data to other transceivers on the same data cable. The logic interface which includes both data and control lines is typically connected to a data communication processor which manages the transfer of data. When a Hot Swap circuit board is plugged into the powered back plane, it is essential that no disturbance to the signal levels on the data cable occur that could be detected as a transition by a receiving device connected to a data cable.
In the transceiver, one or more of the control inputs can act independently or ensemble to enable or disable the transmitter. When the transmitter is disabled, its drivers remain in a high impedance state having minimal leakage currents, such as 1 micro-amp or less. When the drivers for the transmitter are in a high impedance state, the transmitter is unable to impart a signal on the data cable. On the other hand, when the transmitter is enabled, the transmitter has the ability to drive significant amounts of current as high as ten's to hundred's of milli-amps. In this enabled state, the transmitter is able to impart a large signal on the data cable.
When a circuit board is plugged into a powered back plane, a short period of time exists when the data communication processor goes through a power-up initializing sequence. During this time, the output drivers of the data communication processor—which are connected to the control lines of the transceiver—remain in a high impedance state, and therefore are unable to drive the control lines to a defined logic level. The high impedance state may last indefinitely without intervention. The result of this high impedance state is that the control inputs of the transceiver may drift to levels that would enable the transceiver, thus causing large transitions on the data cable. Another complication exists in the fact that there are usually leakage currents as large as +10 micro-amps when these drivers are in the high impedance state. These leakage currents can cause the control inputs to drift high or low, inadvertently enabling the transceiver.
Yet another complication exists relating to the parasitic capacitance that is always present on a circuit board. The typical magnitude of this capacitance can be 10 pF to 50 pF at any signal connection. This parasitic capacitance may provide capacitive coupling of the control lines to either ground or to the power supply voltage. When the power supply voltage is ramping from 0V, capacitive coupling may cause the control lines to be pulled to or held at levels that would enable the transceiver, thereby causing large transitions on the data cable.
There is a need for a circuit that controls the input logic-state of a transceiver such that the control lines of a transceiver are able to be maintained in the disabled state during and after power-up in order to eliminate disturbance to the data cable.
SUMMARY OF THE INVENTION
The present invention solves the needs addressed above. The present invention provides a circuit and method for holding the control inputs in the disabled state as the supply voltage ramps up from 0V, especially in a Hot Swap environment. In accordance with the present invention, the control inputs are held in a disabled state for an indefinite period of time. The enabling/disabling circuit is used to overcome external capacitance that may otherwise pull the control input to the enabled state, thereby causing large disturbances to the data cable which could be erroneously detected as data transitions. The enabling/disabling circuit is also able to overcome continuous leakage currents from external drivers, such as the output drivers of a communication processor that are connected to the control lines of a transceiver. Such drivers may leak current while in their high impedance states. After the first time the external driver actively drives the control input to the enabled state, the internal holding current is turned off and the control input reverts to standard CMOS input that has essentially infinite input impedance.
Two MOS (metal oxide semiconductor) devices, one strong while the other is weak, are connected to each control input of a transceiver. A strong MOS device may be one which will generally maintain the logic state while sinking or sourcing one milli-amp of current, while a weak MOS device may be one which will generally allow the logic state to change when the sink/source current exceeds 50 micro-amps.
The strong MOS device is capable of pulling the input to a disabled state against external capacitance of as much as 100 pF. The weak MOS device requires a moderate input current, such as 100 micro-amps. In the present invention, the input voltage threshold at the input of the integrated circuit which is required to enable the transmitter is shifted by having the input source or sink current across an input resistor. The present invention includes an embodiment for both P-channel devices and N-channel devices. Both MOS devices are turned on while the supply voltage is ramping from zero volts (0V). The strong device remains on for a period of 10-20 microseconds. The strong MOS device pulls the input to a disabled state against external capacitance which can be as much as 100 pF. It is assumed that in the worst case situation the external capacitance is attempting to pull the input to an enabled state. After a timeout following power-up, the strong MOS device is turned off and the weak MOS device remains on while pulling the input to a disabled state. The input is pulled to an enabled state when an external source overcomes the weak MOS device. The weak MOS device requires a moderate input current, such as 100 micro-amps, but once the input is pulled beyond the input voltage threshold to the enabled state, the weak MOS device will be turned off permanently and the input will revert to a standard CMOS input with infinite input resistance.
REFERENCES:
patent: 5220211 (1993-06-01), Christopher et al.
patent: 6032209 (2000-02-01), Mros et al.
patent: 6138195 (2000-10-01), Bermingham et al.
patent: 6308233 (2001-10-01), Park
Cho James
Maxim Integrated Products Inc.
Perkins Coie LLP
Tokar Michael
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