Semiconductor integrated circuit

Electronic digital logic circuitry – Interface – Supply voltage level shifting

Reexamination Certificate

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Details

C326S081000, C326S083000, C327S333000

Reexamination Certificate

active

07425845

ABSTRACT:
The present invention provides a semiconductor integrated circuit having two kinds of input/output circuits realizing higher speed and higher packing density with rational configuration. The semiconductor integrated circuit has a first input/output circuit operating on a first power source voltage, an internal circuit operating on a second power source voltage lower than the first power source voltage, and a second input/output circuit operating on a third power source voltage lower than the first power source voltage. In an output circuit of the first input/output circuit, signal amplitude corresponding to the second power source voltage is converted to signal amplitude corresponding to the first power source voltage by a level shifter, and a P-channel MOSFET and an N-channel MOSFET constructing the output circuit are driven. In an output circuit of the second input/output circuit, a drive signal is generated by a level shifter in a manner similar to the above to drive second and third N-channel MOSFETs for generating an output signal having signal amplitude corresponding to the third power source voltage.

REFERENCES:
patent: 5982705 (1999-11-01), Tsukikawa
patent: 6094067 (2000-07-01), Taniguchi
patent: 6774695 (2004-08-01), Hayashi et al.
patent: 11-111946 (1997-10-01), None

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