Semiconductor integrated circuit

Static information storage and retrieval – Read/write circuit – With shift register

Reexamination Certificate

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C365S201000

Reexamination Certificate

active

11248290

ABSTRACT:
A semiconductor integrated circuit for performing processing relating to a test of a plurality of memory units provided therein while suppressing an increase of a circuit area is provided, wherein testing input data generated in a testing circuit is shifted successively on registers of a first data shift circuit formed by scan flip-flops and transferred to each memory unit when carrying out a test on a plurality of memory units, and testing output data in accordance with the testing input data is shifted successively on registers of a second data shift circuit formed by using scan flip-flops and retrieved by the testing circuit.

REFERENCES:
patent: 5301156 (1994-04-01), Talley
patent: 5448525 (1995-09-01), Sturges
patent: 6246618 (2001-06-01), Yamamoto et al.
patent: 6445627 (2002-09-01), Nakahara et al.

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