Semiconductor integrated circuit

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

Reexamination Certificate

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Details

C326S112000

Reexamination Certificate

active

11188740

ABSTRACT:
In a dynamic flip-flop circuit with a data selection function, for example, when data having an H value is selected using a selection signal, a first node N1is L, a second node N2of a second dynamic circuit is H, so that an output signal has an H level. In this case, when none of a plurality of pieces of data is selected using a selection signal, the first node N1is H, so that the electric charge of the second node N2is discharged and the output signal erroneously has an L level. However, in this case, an output node N3is H and a fourth node N4is L, so that an n-type transistor of the second dynamic circuit is turned OFF, thereby preventing the second node N2from being discharged. Therefore, a normal operation is performed while securing a satisfactorily high-speed operation even when none of the pieces of data is selected.

REFERENCES:
patent: 6549038 (2003-04-01), Sechen et al.
patent: 6750677 (2004-06-01), Sumita
patent: 6791363 (2004-09-01), Amatangelo et al.
patent: 6879186 (2005-04-01), Liu
patent: 2003-60497 (2003-02-01), None

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