Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2007-04-03
2007-04-03
Ha, Dac V. (Department: 2611)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S354000, C711S154000, C711S167000
Reexamination Certificate
active
10649931
ABSTRACT:
A semiconductor integrated circuit includes first and second data paths, first to third flip flops and logic circuits. The first data path transfers input data. The first flip flop is coupled to the first data path for temporally storing data received from the first data path in response to a first clock signal that is delayed from a reference clock signal. One of the logic circuits receives data from the first flip flop and another logic circuit outputs output data. The second flip flop is connected between the logic circuits for transferring signal between them in response to the reference clock signal. The third flip flop is connected to another logic circuit for outputting the output data in response to a second clock signal that is advanced from the reference clock signal. The second data path transfers data received from the third flip flop.
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patent: 4525849 (1985-06-01), Wolf
patent: 5272728 (1993-12-01), Ogawa
patent: 5905766 (1999-05-01), Nguyen
patent: 5996052 (1999-11-01), Taniguchi et al.
patent: 9-16655 (1997-06-01), None
patent: 2000113025 (2000-04-01), None
Ha Dac V.
Oki Electric Industry Co. Ltd.
Rabin & Berdo P.C.
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