Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-11-04
2004-12-14
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S403000, C257S405000, C257S407000
Reexamination Certificate
active
06831336
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a circuit structure that uniformly controls a current value of different channels in a constant current circuit using a plurality of constant current elements each of which outputs a desired current ratio.
2. Description of the Related Art
FIG. 3
is a structural diagram showing the arrangement of N constant current elements in a conventional constant current circuit that outputs the same current. In a conventional constant current circuit using a plurality of p-type or n-type MOS transistors as constant current elements each of which outputs a desired current ratio, as shown in
FIG. 3
, the constant current element of each channel serves as an individual and complete constant current circuit. A gate terminal
1
and a source terminal
2
are commonly used in the respective constant current elements. Also, in order from one end of the gate terminal
1
and source terminal
2
, a first drain terminal
6
that corresponds to first output terminal channel
3
, a second drain terminal
7
that corresponds to a second output terminal channel
4
and an N-th drain terminal
8
that corresponds to an N-th output terminal channel
5
are branched. Reference numeral
12
denotes a contact hole for wiring.
FIG. 4
is a diagram showing the schematic structure of N conventional constant current circuits that output the same current. In
FIG. 4
, in order to understand the arrangement diagram more easily, the gate terminal
1
and the source terminal
2
are omitted from the structural diagram of
FIG. 3
, and only the connection of the drain terminals is shown. In this way, the constant current elements respectively having the second output terminal channel
4
and the second output terminal channel
5
are disposed adjacent to the completed layout of the constant current element having the first output terminal channel
3
and the first drain terminal
6
, and the same arrangement is used for each element up to the N-th constant current element. Also, in a conventional structural example, constant current elements in which the drain terminal is not branched are arranged in parallel with each other (refer to Patent Document 1 is JP 9-73331 A (FIG.
6
)).
However, in the conventional structure described above, a difference in the wiring resistance value occurs in portions that correspond to gate terminal
1
and the source terminal
2
because there is a difference in the distance form the constant current source due to the arrangement of the respective constant current elements. As a result, there arises a problem in that the current and the voltage which are supplied from the gate terminal
1
and the source terminal
2
are different among the respective current constant elements. In addition, because an influence of temperature due to other structural elements or the like is different depending on locations at which the respective constant current elements are arranged, a difference occurs in the current values of the respective channels due to an influence of the wiring resistance value and the temperature, resulting in a problem in that accurate control of current becomes difficult.
SUMMARY OF THE INVENTION
The present invention has been made in order to solve the above-mentioned problems.
To achieve the above object, according to the present invention, respective drain branched terminals of p-type or n-type MOS transistors which are constant current elements of a constant current circuit are disposed alternately for a plurality of pieces from both ends of a layout pattern. That is, in the case where N constant current elements exist in the constant current circuit, the drain terminals are disposed from one end thereof in the order of a first-channel drain terminal, a second-channel drain terminal and so on up to an N-th channel drain terminal, and the drain terminals are also disposed from a left end in the order of a first-channel drain terminal, a second-channel drain terminal and so on up to an N-th channel drain terminal in such a manner that the N-th channel branched drain terminals are adjacent to each other in the center.
Also, as another means, the respective branched drain terminals of the p-type or n-type MOS transistors which are the constant current elements of the constant current circuit are disposed alternately for a plurality of pieces from one end of the layout pattern. That is, in the case where N constant current elements are disposed in the constant current circuit, the drain terminals are disposed from one end thereof in the order of a first-channel drain terminal, a second-channel drain terminal and so on up to an N-th channel drain terminal, and the drain terminals are again disposed in the order of a first-channel drain terminal, a second-channel drain terminal and so on up to an N-th channel drain terminal, so that in the case where the number of respectively branched drain terminals is M, the drain terminals are disposed alternately by M drain terminals.
With the above arrangement, it is possible to unify an influence of wiring resistances which are added to the source terminal and the gate terminal by the element unit of the p-type or n-type MOS transistor which is each constant current element. In addition, it is possible to unify an influence of current values due to a change in temperature. Therefore, in the constant current circuit that outputs a plurality of desired current ratios, it is possible to improve a precision of the current value control of the respective channels.
REFERENCES:
patent: 5874764 (1999-02-01), Hsieh et al.
Adams & Wilks
Seiko Instruments Inc.
Wojciechowicz Edward
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