Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction
Reexamination Certificate
2001-02-08
2003-06-10
Le, Don Phu (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Output switching noise reduction
C326S033000, C326S082000
Reexamination Certificate
active
06577153
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor integrated circuit. The present invention particularly relates to a semiconductor integrated circuit, such as a system LSI installed in a portable equipment, which is required to have good speed performance while the circuit operates and to consume less power while the circuit does not operate.
2. Description of the Related Art
Conventionally, a semiconductor integrated circuit is realized by combining transistors such as a PMOS transistor, an NMOS transistor and the like. To operate an inverter circuit at high speed with transistors having the same size, it is most effective to set the threshold voltages of the transistors at a low value, or about 0.2 V compared with a normal threshold voltage of about 0.6 V.
However, if the threshold voltage is set low, a leak current occurs even while a gate is turned off and power consumption increases in an inoperative state. Due to this, the following measures have been conventionally proposed.
FIG. 14
is a block diagram of a conventional semiconductor integrated circuit
10
. As shown in
FIG. 14
, the semiconductor integrated circuit
10
has an MTCMOS (Multi-Threshold-Voltage CMOS) configuration in which an element having a high threshold voltage for power supply, i.e., a power switch
20
employing an element in which no leak current flows even when a gate is turned off, is attached to the power supply line of a transistor circuit
30
, to thereby stop supplying power in an inoperative state.
Although a problem does not specially occur to an LSI circuit constituted by a block consisting of an element having a low threshold voltage (to be referred to as ‘LVT block’ hereinafter), an LSI circuit, such as a system LSI, constituted by a mixture of an element having a high threshold voltage (to be referred to as ‘HVT block’ hereinafter) and an LVT block is encountered by the following disadvantage. When no power is supplied to the LVT block, i.e., the LVT block is not actuated, the output of the LVT block has a high impedance. Following this, the input signal of the HVT block which is operating has a high impedance, as well, which disadvantageously causing the HVT block to malfunction or causing considerable power consumption.
SUMMARY OF THE INVENTION
The present invention has been made in view of the above-stated problems with the conventional semiconductor integrated circuit. It is, therefore, an object of the-present invention to provide a novel, improved semiconductor integrated circuit capable of realizing low current consumption while the integrated circuit is not actuated in the LSI circuit constituted by a mixture of the HVT block and the LVT block.
To obtain the above object, according to the first aspect of the present invention, there is provided a semiconductor integrated circuit having a mixture of elements having different threshold voltages, comprising: means for controlling power supplied to an LVT block; means for fixing an level of an output signal from the LVT block to a predetermined level when no power is supplied to the LVT block; and means for fixing a level of an input voltage inputted into the LVT block to a predetermined level when no power is supplied to the LVT block. Here, the means for fixing the level of the input voltage inputted into the LVT block to a predetermined level can be dispensed with, depending on the circuit arrangement of the LVT block.
The level of the output signal can be set at a value of GND, VDD or a value outputted just before power supplied to the LVT block is stopped. The input voltage preferably has a high impedance.
Further, according to the second aspect of the present invention, there is provided a semiconductor integrated circuit having a mixture of elements having different threshold voltages, comprising: means for controlling power supplied to an LVT block; means for fixing a level of an output signal from an HVT block to a predetermined level when no power is supplied to the LVT block; and means for fixing a level of an input voltage inputted into the HVT block to a predetermined level when no power is supplied to the LVT block. Here, the means for fixing the level of the output signal from the HVT block to a predetermined level can be dispensed with, depending on the circuit arrangement of the LVT block.
The level of the input signal can be set at a value of GND, VDD or a value inputted into the HVT block just before power supplied to the LVT block is stopped. The output signal preferably has a high impedance.
With the above-stated constitution, a semiconductor integrated circuit capable of preventing the HVT block from malfunctioning and preventing high power consumption even in a state in which the power supplied to the LVT block is stopped, is provided.
REFERENCES:
patent: 5486774 (1996-01-01), Douseki et al.
patent: 6208170 (2001-03-01), Iwaki et al.
patent: 6222410 (2001-04-01), Seno
patent: 6310491 (2001-10-01), Ogawa
patent: 2000-101418 (2000-04-01), None
Le Don Phu
Oki Electric Industry Co. Ltd.
Volentine & Francos, PLLC
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