Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

2000-04-28

2003-07-29

Decady, Albert (Department: 2784)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S719000, C365S201000

Reexamination Certificate

active

06601198

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a semiconductor integrated circuit including a test circuit which tests two or more circuits, and more particularly, to a semiconductor integrated circuit which tests a plurality of circuits which should be produced as the same structure.
This application is counterparts of Japanese patent applications, Serial Number 343175/1999, filed December 2, the subject matter of which is incorporated herein by reference.
2. Description of the Related Art
Conventional circuit which tests whether two or more circuits which should be produced as the same structure are actually produced as the same structure, is comprised of a selector connected to outputs of the two or more circuits and an output buffer circuit connected between the selector and an output terminal.
The selector selectively transfers a signal of any one circuit among the two or more circuits in response to a selection signal. The output buffer circuit transfers an output signal from the selector to the output terminal.
The signal applied to the output terminal is compared with an expected value signal by a tester. By the above operation, whether or not the selected circuit is correctly produced can be tested.
In the conventional circuit, the same test has to be repeated for times corresponding to the number of circuits which should be tested, and there was a problem that test time increased.
Consequently, there has been a need for an improved semiconductor integrated circuit.
SUMMARY OF THE INVENTION
It is an object of the present invention is to provide a semiconductor integrated circuit that may reduce a test time for testing logic circuits.
According to one aspect of the present invention, for achieving one or more of the above objects, there is provided a semiconductor integrated circuit which includes logic circuits, each of which receives an input signal and generates an output signal comprising bits, and a selector which is coupled to the logic circuits and selectively transfers either one of the output signals output from the logic circuits in response to a selection signal. The semiconductor integrated circuit also includes a comparator which compares the output signals output from the logic circuits with an expected value signal and outputs a result of the comparison, and output terminals. The semiconductor integrated circuit also includes an output buffer which is coupled between the selector and the output terminals, and controls transferring the output signal transferred from the selector to the output terminals in response to the result of the comparison.


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