Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2008-01-29
2008-01-29
Le, Thong Q. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S094000, C365S207000
Reexamination Certificate
active
07324397
ABSTRACT:
A semiconductor integrated circuit has a nonvolatile memory and a logic circuit which uses information stored in the nonvolatile memory to perform logical operation. The nonvolatile memory comprises bit lines, word lines, and memory cells. The memory cell comprises MOS transistors whose gate electrodes are connected with a word line. Information storage is carried out according to whether one source/drain electrode of the MOS transistors is connected with a source line or floated. During other periods than a predetermined period in the operation of accessing the memory cell, the potential difference between the source/drain electrodes of the MOS transistors constituting the memory cell is zeroed. Subthreshold leakage current is prevented from passing through the memory cell on standby. During the predetermined period in accessing operation, a potential difference is produced between the source/drain electrodes of the MOS transistors. Therefore, the bit line potential can be varied by word line
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Office Action and copy of English Translation of Office Action dated May 8, 2007.
Katoh Kei
Miyazaki Shinya
Yamauchi Koudoh
Antonelli, Terry Stout & Kraus, LLP.
Hitachi ULSI Systems Co. Ltd.
Le Thong Q.
Renesas Technology Corp.
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