Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

1999-06-14

2001-11-27

Crane, Sara (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S343000

Reexamination Certificate

active

06323526

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to output parts of a semiconductor integrated circuit such as a power switch IC used for power-control/power-saving-control purposes, and particularly relates to a pattern shape of a set of MOSFET devices which particularly require a high-density implementation.
2. Description of the Related Art
Output parts of power switch ICs need to possess great driving power, and, thus, is comprised of a large number of MOSFET devices.
FIG. 2
is an illustrative drawing showing a configuration of output parts of a related-art power switch IC.
As shown in
FIG. 2
, MOSFET devices are arranged in a matrix formation at high density within a limited space. Source regions are connected via wires between different devices, and so are drain regions, thereby forming a large single transistor device.
FIG. 3
is an illustrative drawing showing an enlarged view of MOSFET devices which are arranged as the output parts of the related-art power switch IC.
In
FIG. 3
, source electrodes
14
and
15
cover source regions of MOSFET devices, which exist beneath the source electrodes
14
and
15
. Likewise, drain electrodes
16
and
17
cover drain regions of the MOSFET devices, which underlay the drain electrodes
16
and
17
. These electrodes are formed from an aluminum layer. A wire
18
diagonally connect adjacent drain electrodes
16
and
17
, and is formed from the same aluminum layer. Contact holes
19
and
20
connect between the source electrodes
14
and
15
and the underlaying source regions, respectively. Contact holes
21
and
22
connect between the drain electrodes
16
and
17
and the underlaying drain regions, respectively.
The wire
18
is diagonally laid out in order to help to shorten a distance between MOSFET devices, thereby achieving a high packing density of the MOSFET devices. The extent to which the MOSFET devices are packed in a compact space will determine the overall area size of the output parts. The higher the packing density, the smaller the area size of the power switch IC is.
In a MOSFET pattern, however, there is a limit to how short a tolerable distance can be between regions. A minimum tolerable distance is governed by such factors as limits of lithography or etching processes as well as distances necessary to insure electrical insulation.
With reference to
FIG. 3
, a description will be given below with regard to distances between regions of MOSFET devices and associated problems.
In
FIG. 3
, a distance between a perimeter of the contact holes
19
and
20
and source electrodes
14
and
15
, respectively, is denoted as
24
. This distance
24
must be longer than such a minimum tolerable distance as a margin of error for relative positioning requires. A distance
25
is the shortest distance between the wire
18
and either one of the source electrodes
14
and
15
. Since the wire
18
and the source electrodes
14
and
15
are formed in the same layer, the distance
25
must be longer than such a minimum tolerable distance as electrical insulation can be secured. A distance
26
between the source electrodes
14
and
15
and the drain electrodes
16
and
17
represents a distance between the MOSFET devices arranged in a matrix.
In the related-art configuration of the MOSFET devices as shown in
FIG. 3
, if the distance
26
between the MOSFET devices is shortened, the rectangular source electrodes
14
and
15
may have corners thereof approaching too close to the wire
18
, so that the distance
25
may become shorter than the minimum tolerable distance. In order to keep this minimum tolerable distance, intervals at which the MOSFET devices are arranged cannot be shortened than certain limits. There is a limit, therefore, to a reduction in a device size as long as the related-art configuration of MOSFET devices is used. It should be noted that the same argument applies to a distance between the drain electrodes
16
and
17
and a diagonally installed wire (not shown) connecting source regions together.
Accordingly, there is a need for a semiconductor integrated circuit which allows MOSFET devices forming output parts thereof to be densely arranged, thereby reducing an overall size of the output parts.
SUMMARY OF THE INVENTION
Accordingly, it is a general object of the present invention to provide a semiconductor integrated circuit which can satisfy the need described above.
It is another and more specific object of the present invention to provide a semiconductor integrated circuit which allows MOSFET devices forming output parts thereof to be densely arranged, thereby reducing an overall size of the output parts.
In order to achieve the above objects according to the present invention, a semiconductor integrated circuit includes four electrodes arranged in a matrix, and a wire connecting between two electrodes which are diagonally positioned to each other and selected from said four electrodes, wherein the two remaining electrodes are diagonally positioned to each other across said wire, and have a side thereof facing said wire and extending in parallel to a longitudinal direction of said wire.
According to the semiconductor integrated circuit as described above, a shape of an electrode is different from a rectangular electrode used in the related-art configuration, which had a corner thereof closest to the wire and thus limiting how close the electrode can be to the wire. This corner of the rectangular electrode is beveled in the present invention, so that the electrode can be placed closer to the wire, thereby helping to reduce distances between the MOSFET devices.
According to another aspect of the present invention, a semiconductor integrated circuit includes four electrodes arranged in a matrix, and a wire connecting between two electrodes which are diagonally positioned to each other and selected from said four electrodes, wherein the two remaining electrodes are diagonally positioned to each other across said wire, and have a substantially circular shape.
According to the semiconductor integrated circuit described above, distances between the electrodes can be shortened to a minimum distance at any angle without making any slack, so that distances between MOSFET devices can be further reduced.
According to another aspect of the present invention, a semiconductor-device pattern includes four contact holes arranged in a matrix, four electrodes each corresponding to respective one of said four contact holes, each of said electrodes having a pattern area larger than that of a corresponding one of said contact holes so as to tolerate a margin of error in relative positioning of said electrodes and said contact holes, and a wire laid out in the same layer as said electrodes and connecting between two electrodes which are diagonally positioned to each other and selected from said four electrodes, wherein the two remaining electrodes are diagonally positioned to each other across said wire, and each of said two remaining electrodes have a point which is closest to said wire on a perimeter thereof, a shortest distance between the point and a corresponding contact hole is shorter than {square root over ( )}2 times a shortest distance between the perimeter and the corresponding contact hole.
The configuration described above can reduce a gap between the electrodes and the wire compared to the related-art configuration. Namely, distances between the MOSFET devices can be reduced.
The same objects can also be achieved by a semiconductor device as described in the following.
According to one aspect of the present invention, a semiconductor device includes electrodes arranged in a matrix and wires connecting between electrodes and extending diagonally to columns and rows of the matrix, wherein one of said electrodes closest to and not connected to a given one of said wires has a side thereof facing the given one of said wires and extending in parallel to a longitudinal direction of the given one of said wires.
Other objects and further features of the present inve

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