Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
1999-03-03
2001-03-27
Zarabian, A. (Department: 2824)
Static information storage and retrieval
Read/write circuit
Signals
C365S221000, C365S189050
Reexamination Certificate
active
06208566
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a semiconductor integrated circuit, more particularly, to the semiconductor integrated circuit having a read register and a write register. Such registers are employed in a FIFO (First In First Out) memory and in a VRAM (Video Random Access Memory).
This application is a counterpart of Japanese patent applications, Serial Number 0118758/1998, filed Apr. 28, 1998 and Serial Number 0203441/1998, filed Jul. 17, 1998, the subject matter of which are incorporated herein by reference.
2. Description of the Related Art
A conventional technique is described in Japanese Laid Open Patent Application No. 07-65569. This patent application discloses a semiconductor integrated circuit having a read register and a write register, each of the registers being comprised of two inverters. A data stored in the write register is transferred to the read register through a transmission gate.
However, the patent application does not describe the relationship between the drive capacity of the inverter in the read register and the drive capacity of the inverter in the write register. If the drive capacity of the inverter in the read register is larger than that of the inverter in the write register, there is a possibility that the data transferred from the write register is inverted by the read register. Consequently, there has been a need for an improved semiconductor integrated circuit.
SUMMARY OF THE INVENTION
It is an object of the present invention is to provide a semiconductor integrated circuit that ensures accurate data transfer.
It is another object of the present invention is to provide a semiconductor integrated circuit that reduces power consumption.
According to one aspect of the present invention, for achieving the above object, there is provided a semiconductor integrated circuit that includes a first voltage node of a first voltage level, a second voltage node of a second voltage level, a first data store circuit coupled to the first and second voltage nodes and which stores a data, and a second data store circuit. The semiconductor integrated circuit further includes a control circuit which outputs a transfer signal and a switching signal, a data transfer circuit coupled between the first data store circuit and the second data store circuit and which selectively transfers the data in the first data store circuit to the second data store circuit in response to the transfer signal, a first conductive line which supplies the first voltage level to the second data store circuit and a second conductive line which supplies the second voltage level to the second data store circuit. The semiconductor integrated circuit also includes a first switch circuit coupled between the second voltage node and the second conductive line and which selectively connects the second voltage node to the second conductive line in response to the switching signal and a resistive element coupled between the second conductive line and the first voltage node.
The above and further objects and novel features of the invention Will more fully appear from the following detailed description, appended claims and the accompanying drawings.
REFERENCES:
patent: 5148399 (1992-09-01), Cho
patent: 5361236 (1994-11-01), Iwakiri
patent: 3-25791 (1991-02-01), None
patent: 5-155374 (1993-07-01), None
patent: 7-65569 (1995-03-01), None
Kawagoe Masakuni
Kuroki Osamu
Jones Volentine, L.L.C.
OKI Electric Industry Co., Ltd.
Zarabian A.
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