Semiconductor integrated circuit

Details Semiconductor integrated circuit Semiconductor integrated circuit

1997-10-24

1999-08-31

Tokar, Michael

Electronic digital logic circuitry

Interface

Logic level shifting

396 67, 396 73, 396 77, H03K 190175

Patent

active

059458437

ABSTRACT:
A level conversion circuit as a semiconductor integrated circuit has a first load resistance (R1), a second load resistance (R2), a first NMOS transistor (MN3) and a second NMOS transistor (MN4) connected to them (R1 and R2) in parallel, respectively, that are driven directly by positive CMOS level signals, a first bipolar transistor (Q1), and a second bipolar transistor (Q2). Both emitters of the first and second bipolar transistors (Q1 and Q2) are connected commonly, and a voltage potential that is lower than a voltage potential of a collector of the first bipolar transistor (Q1) by a predetermined voltage potential is supplied into a base of the second bipolar transistor (Q2).

REFERENCES:
patent: 4782467 (1988-11-01), Belt et al.
patent: 5148059 (1992-09-01), Chen et al.
patent: 5561382 (1996-10-01), Ueda et al.
patent: 5635859 (1997-06-01), Yokota et al.
Yusuke Ohtomo et al., "A Low Power CMOS-ECL Level Converter," The Institute of Electronics, Information and Communication Engineers, Spring 1993, pp. 5-207, (English translation of relevant portion attached).

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