Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – With lattice constant mismatch
Reexamination Certificate
2010-06-30
2011-12-27
Fahmy, Wael (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
With lattice constant mismatch
C257S019000, C257S077000, C257SE29193, C257SE29085
Reexamination Certificate
active
08084784
ABSTRACT:
The invention relates to a method for forming a semiconductor heterostructure by providing a substrate with a first in-plane lattice parameter a1, providing a buffer layer with a second in-plane lattice parameter a2and providing a top layer over the buffer layer. In order to improve the surface roughness of the semiconductor heterostructure, an additional layer is provided in between the buffer layer and the top layer, wherein the additional layer has a third in-plane lattice parameter a3which is in between the first and second lattice parameters.
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Figuet Christophe
Kennard Mark
Fahmy Wael
Jefferson Quovaunda V
S.O.I. Tec Silicon on Insulator Technologies
Winston & Strawn LLP
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