Semiconductor heterojunction device with ALN buffer layer of 3nm

Details Semiconductor heterojunction device with ALN buffer layer of 3nm Semiconductor heterojunction device with ALN buffer layer of 3nm

1995-03-08

1997-08-12

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

With lattice constant mismatch

257 96, 257 97, 257103, 372 43, 372 50, H01L 29205, H01L 2715, H01S 319

Patent

active

056568320

ABSTRACT:
A semiconductor device comprises a single crystal substrate, a nucleus formation buffer layer formed on the single crystal substrate, and a lamination layer including a plurality of Al.sub.1-x-y Ga.sub.x In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, x+y.ltoreq.1) layers laminated above the nucleus formation buffer layer. The nucleus formation buffer layer is formed of Al.sub.1-s-t Ga.sub.s In.sub.t N (0.ltoreq.s .ltoreq.1, 0.ltoreq.t.ltoreq.1, s+t.ltoreq.1) and is formed on a surface of the substrate such that the nucleus formation buffer layer has a number of pinholes for control of polarity and formation of nuclei. A method of fabricating a semiconductor device comprises the steps of: forming, above an Al.sub.1-x-y Ga.sub.x In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1, x+y.ltoreq.1) semiconductor layer doped with a p-type dopant, a cap layer for preventing evaporation of a constituent element of the semiconductor layer, the cap layer being formed of one of AlN in which a p-type dopant is added and Al.sub.2 O.sub.3, subjecting the semiconductor layer to heat treatment, and removing at least a part of the cap layer.

REFERENCES:
patent: 5218216 (1993-06-01), Manabe et al.
patent: 5247533 (1993-09-01), Okazaki et al.

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