Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Patent
1998-08-19
2000-08-29
Fourson, George
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
438423, H01L 21302
Patent
active
061107948
ABSTRACT:
A semiconductor fabrication process uses a buried, oxygen-rich layer as a stop etch in a trench isolation area, with minimal masking. According to one embodiment, the process involves applying a mask to protect selected portions of a silicon-based substrate, and then using the mask to implant an oxygen-based substance into unmasked portions of the substrate, thereby forming a buried oxygen layer at a selected depth within the substrate. The same mask is then used in an etching process to form the desired trench structure. The depth of the trench is defined as a result of terminating the etch process upon reaching the buried oxygen layer.
REFERENCES:
patent: 3622382 (1971-11-01), Brack et al.
Stoev et al, "Formation of etch-stop structures utilizing ion-beam synthesized buried oxide and nitride layers in silicon", Elsevier Sequoia, pp. 183-195, 1989.
S. Wolf, "Silicon Processing for the VLSI Era", Lattice Press, vol. I, pp. 547-555 and 567, 1990.
Stanley Wolf, Ph.D., Silicon Processing for the VLSI Era, vol. 2: Process Integration, 1990, pp. 105-106.
Fourson George
Garcia Joannie A.
Philips Semiconductors of North America Corp.
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