Semiconductor growth method

Details Semiconductor growth method Semiconductor growth method

1996-06-21

2003-02-18

Kunemund, Robert (Department: 1765)

Single-crystal, oriented-crystal, and epitaxy growth processes;

Apparatus

With means for measuring, testing, or sensing

C117S202000, C117S085000, C117S086000, C118S715000

Reexamination Certificate

active

06521042

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to electronic devices, and, more particularly, to fabrication methods for semiconductors.
The continual demand for enhanced transistor and integrated circuit performance has resulted in improvements in existing devices, such as silicon bipolar and CMOS transistors and gallium arsenide MESFETs, and also the introduction of new device types and materials. In particular, the demand for low noise and high power at microwave frequencies has led to high electron mobility transistors (HEMTs) made of combinations of gallium arsenide (GaAs) plus aluminum gallium arsenide (Al
x
Ga
1−x
As) and pseudomomrphic HEMTs made of combinations of Al
x
Ga
1−x
As and indium gallium arsenide (In
x
Ga
1−x
As) in a MESFET-like structure. Similarly, heterojunction bipolar transistors (HBTs) made of wide bandgap emitters with narrow bandgap bases (e.g., Al
x
Ga
1−x
As emitters with GaAs bases or silicon emitters with silicon-germanium bases) overcome the all-silicon bipolar transistor limitation on base doping levels due to carrier injection into the emitter.
Further, scaling down device sizes to enhance high frequency performance leads to observable quantum mechanical effects such as carrier tunneling through potential barriers. This led to development of alternative device structures such as resonant tunneling diodes and resonant tunneling hot electron transistors which take advantage of such tunneling phenomena. For example, Mars et al., Reproducible Growth and Application of AlAs/GaAs Double Barrier Resonant Tunneling Diodes, 11 J.Vac.Sci.Tech.B 965 (1993), and Özbay et al, 110-GHz Monolithic Resonant-Tunneling-Diode Trigger Circuit, 12 IEEE Elec.Dev.Lett. 480 (1991), each use two AlAs tunneling barriers imbedded in a GaAs structure to form a quantum well resonant tunneling diode. The quantum well may be 4.5 nm thick with 1.7 nm thick tunneling barriers. Resonant tunneling transistors improve upon resonant tunneling diodes by providing gain and come in a variety of types. In particular, HBTs and hot electron transistors (HETs) with one or more double barrier quantum well energy filters located in their emitters yield resonant tunneling bipolar transistors (RTBTs) and resonant tunneling hot electron transistors (RHETs), respectively. Futatsugi et al, Resonant Tunneling Bipolar Transistors Using InAlAs/InGaAs Heterostructures, 65 J.Appl.Phys. 1771 (1989), describes the characteristics of an RTBT.
The foregoing devices all require structures with sharp heterojunctions and the resonant tunneling devices further require multiple thin (~2 nm thick) compound semiconductor layers. Molecular beam epitaxy (MBE) provides the typical fabrication method for such structures.
FIG. 1
illustrates a simple MBE system
100
which includes a high vacuum chamber
102
with a rotating wafer holder
104
and effusion cells
106
aimed at the wafer holder, plus various optional detector systems such as reflection high energy electron diffraction (RHEED)
110
-
111
, ellipsometry
112
-
113
, and line-of-sight in situ reflection mass spectrometer (REMS)
115
. Wafers are typically circular with two-inch or three-inch diameter and 0.5 mm thickness. Wafer holder
104
includes a heater and thermocouple to control the temperature of wafer
120
, typically in the range of 400 to 700° C. The pump maintains chamber
102
at a very low pressure, typically on the order of 5×10
−9
torr during growth. This pressure implies atoms and molecules have a mean free path larger than the diameter of chamber
102
.
Basically, the operation of MBE system
100
to grow layers on wafer
120
is as follows. First, effusion cells
106
are charged with quantities of the species required to grow the desired layers on wafer
120
; for example, one effusion cell may contain aluminum (Al), another gallium (Ga), a third indium (In), and a fourth arsenic (As). This would be sufficient to grow layers of compound semiconductors such as GaAs, In
x
Ga
1−x
As, AlAs, Al
x
Ga
1−x
As, and so forth. Then to grow a layer of GaAs, the shutters of the gallium and the arsenic effusion cells are opened and beams of gallium and arsenic (perhaps in the form of As
2
or As
4
) impinge on wafer
120
. Ideally, the atoms/molecules of the impinging Ga and As beams stick to and migrate on the surface of wafer
120
and react to form GaAs. Due to the volatility of arsenic, an arsenic over-pressure is maintained deter decomposition of the growing arsenic compounds. Thus, the arsenic beam may have a flux a thousand times that of the gallium, aluminum, or indium beams.
The detector systems such as RHEED permit (for a non-rotating wafer) assessment of the crystal quality and growth rate of the surface layer of wafer
120
, and ellipsometry allows layer thickness measurements. REMS permits evaluation of the sticking coefficient and desorption of one of the elements as a function of temperature. See Brennan et al, Application of Reflection Mass Spectrometry to Molecular-Beam Epitaxial Growth of InAlAs and InGaAs, 7 J.Vax.Sci.Tech.B 277 (1989); Brennan et al, U.S. Pat. No. 5,171,399; and Brennan et al, Reactive Sticking of As
4
during Molecular Beam Homoepitaxy of GaAs, AlAs, and InAs, 10 J.Vac.Sci.Tech.A 33 (1992). Also, see U.S. Pat. No. 5,096,533.
However, MBE growth of layers has problems including accurate control of layer thickness. The layer thickness of the electronic device is important in determining the electrical characteristics of the electronic devices. The typical growth procedure determines average growth rates, and then synchronizes the opening and closing of effusion cell shutters to give nominal layer thicknesses based on the average growth rates. Because the average growth rates are often determined with thick-layer growths and post-growth analysis, extrapolation of these results to growth of thin layers can result in large deviations from nominal thickness values. The true layer thickness can also differ from the nominal due to fluctuations in effusion cell flux or change in growth conditions such as wafer surface temperature. A method is needed for accurate determination of growth rate during layer deposition, such that each of the layer thicknesses can be precisely controlled.
SUMMARY OF THE INVENTION
The present invention provides MBE growing layer thickness control by feedback analysis from measurements of the reflected flux of growth species.
The present invention grows or produces a series of multi-layer structures each having one or more structure devices mounted on the multi-layered structures. The physical characteristics of these devices are measured, including the thickness of the first barrier, the second barrier and the quantum well. From these physical characteristics, desired electrical characteristics of the multi-layered structure are predicted. Actual electrical characteristics of the multi-layered structure are determined, and the desired or predicted electrical characteristics are compared with the actual electrical characteristics with modeling techniques to obtain a model of the multi-layered structures. This model is used in conjunction with the growth of the layers of the device. More specifically, as the layers are being grown, the thickness of the layers are measured, and these thicknesses are used to correct the thickness of layers that are yet to be grown. In this way, the model may be used to obtain the desired or target electrical characteristics by correcting for the over or under growth of layers which have been previously grown.
Other Major Class to be used with the present invention include optical materials, which don't have device structures or electrical characteristics, but optical characteristics (e.g. high reflectivity at a target wavelength).


REFERENCES:
patent: 4332833 (1982-06-01), Aspnes et al.
patent: 5091320 (1992-02-01), Aspnes et al.
patent: 5171399 (1992-12-01), Brennan et al.
patent: 5277747 (1994-01-01), Aspnes
patent: 5313044 (1994-05-01), Massoud et al.
patent: 5399521 (1995-03-01), Celii et al.
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