Semiconductor fabrication process including recessed...

Details Semiconductor fabrication process including recessed... Semiconductor fabrication process including recessed...

2006-08-15

2006-08-15

Tsai, H. Jey (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

On insulating substrate or layer

C438S151000, C438S300000

Reexamination Certificate

active

07091071

ABSTRACT:
A method of forming a transistor with recessed source/drains in an silicon-on-insulator (SOI) wafer includes forming isolation structures in an active layer of the wafer, where the isolation structures preferably extend through the active layer to a BOX layer of the wafer. An upper portion of the active layer is removed to form a transistor channel structure. A gate dielectric is formed on the channel structure and a gate structure is formed on the gate dielectric. Etching through exposed portions of the gate dielectric, channel structure, and BOX layer is performed and source/drain structures are then grown epitaxially from exposed portions of the substrate bulk. The isolation structure and the BOX layer are both comprised primarily of silicon oxide and the thickness of the isolation structure prevents portions of the BOX layer from being etched.

REFERENCES:
patent: 6121659 (2000-09-01), Christensen et al.
patent: 6420218 (2002-07-01), Yu
patent: 2003/0132504 (2003-07-01), Bertin et al.

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