Metal fusion bonding – Process – Bonding nonmetals with metallic filler
Reexamination Certificate
1999-08-20
2001-03-13
Ryan, Patrick (Department: 1725)
Metal fusion bonding
Process
Bonding nonmetals with metallic filler
C228S234100
Reexamination Certificate
active
06199748
ABSTRACT:
FIELD OF THE INVENTION
The invention pertains to the field of design and fabrication of composite substrates and integration of materials. More particularly, the invention pertains to a method for making compliant composite semiconductor substrates for heterogeneous epitaxial growth.
BACKGROUND OF THE INVENTION
Epitaxy is a technology for growth of thin crystal film. A variety of advanced electronic and optoelectronic devices are fabricated by using heteroepitaxial thin layer crystal structures. The quality of the epitaxial layers determines the device performance.
In general, the lattice constant and thermal expansion coefficient are the two important factors for the quality of epitaxial layers of materials. The strain induced by the difference in lattice constants between the epitaxial layer and the substrate creates misfit dislocations in the epitaxial layers when the film thickness reaches a certain thickness, namely the critical thickness. The misfit dislocations extend until they reach the edge of the wafer or the surface of the epitaxial layer during growth. The section of dislocation moving through the entire epilayer thickness is referred to as threading dislocation, and is detrimental to device performance.
Theories and some experimental results (e.g., M. Tachikawa, et al., Appl. Phys. Lett. 56, 2225, 1990 ) demonstrate that the formation and movement of a large number of dislocations in heterogeneous epitaxial materials often happens in the cooling stage after growth. This is true when the thermal expansion coefficient of the epitaxial layer is larger than that of the substrate, e.g., GaAs on Si. The large difference between the thermal expansion coefficients of the epitaxial layer and substrate (e.g., GaAs on Si ) produces a thermal stress strong enough to generate and move dislocations. The thermal stress induced dislocations and concurrent dislocation propagation to the epitaxial layer surface is the main mechanism of dislocation generation in the cooling stage. It should be noted that in the GaAs on Si case, the GaAs epitaxial layer is always in tensile stress during cooling. Based on the mechanical properties of thin films and experimental results, the film in tension always causes plastic deformation problems, besides microscopic dislocations, such as macroscopic cracking and dehesion (or debonding). The film in compression can also create dislocations, but the movement of dislocations to the surface of epitaxial layers is suppressed by compressive thermal stress, which does not cause the cracking problem. This discussion is also applicable to heterogeneous material bonding. Since the role of the lattice constant is understood, we concentrate on the role of thermal stress here.
High quality integration of heterogeneous materials with large differences in thermal expansion coefficients and lattice constants, such as GaAs on Si, by means of wafer bonding technologies is a serious problem. Many research groups all over the world are pursuing this target. To realize the target we tried several different technologies, including:
1) direct bonding,
2) thin intermediate metal film bonding, and
3) RT (room temperature) bonding.
Direct bonding is conducted under high temperature and high pressure. Our experimental results indicate that the bonded wafers have very strong bonding strength but the wafers often crack or fracture into small pieces due to strong thermal stress. Obviously we cannot create a compliant composite substrate by using this technology.
Bonding by thin intermediate metal film can be implemented at high temperatures and pressures. We chose a metal, such as Cr, with a high melting point and good adhesion to semiconductors as the intermediate material. The crack and fracture problem seems to be alleviated to some extent, but the bonding strength is not strong enough to withstand the thermal stress generated. Debonding often occurred.
RT bonding is a new technology for heterogeneous material integration at room or low temperature and under low pressure. We achieved a bonding interface thermally stable up to 700° C. Even though this technology works well, a substrate bonded by this method is still unable to function as a compliant substrate and thermal stress self-adjuster during growth.
SUMMARY OF THE INVENTION
This invention discloses a novel reliable technology termed Semiconductor Eutectic Alloy Metal (SEAM) technology for high quality integration of heterogeneous materials and fabrication of compliant composite substrates or stress-engineered substrates. Using the SEAM technology, a high quality composite substrate possesses excellent thermal stability to withstand high temperature thermal cycling from room temperature to 900° C. without degradation of crystal quality. These compliant composite substrates, acting as the self-adjuster of thermal stress, can meet the requirements for high quality heteroepitaxial growth. This technology can be extensively applied to integration of semiconductor-semiconductor, semiconductor-metal, and other material systems in which high quality crystal surface, excellent thermal stability, and good mechanical property are required for fabrication and packaging of electronic and optoelectronic devices and circuits.
Briefly stated, a method of semiconductor eutectic alloy metal (SEAM) technology for integration of heterogeneous materials and fabrication of compliant composite substrates takes advantage of eutectic properties of alloys. Sub
1
and Sub
2
are used to represent the two heterogeneous materials to be bonded or composed into a compliant composite substrate. For the purpose of fabricating compliant composite substrate, the first substrate material (Sub
1
) combines with the second substrate material (Sub
2
) to form a composite substrate that controls the stress in the epitaxial layers during cooling. The second substrate material (Sub
2
) controls the stress in the epitaxial layer grown thereon so that it is compressive during annealing. A joint metal (JM) with a melting point of T
m
is chosen to offer variable joint stiffness at different temperatures. JM and Sub
1
form a first eutectic alloy at a first eutectic temperature T
eu1
while JM and Sub
2
form a second eutectic alloy at a second eutectic temperature T
eu2
. T
m1
and T
m2
are the melting points of Sub
1
and Sub
2
, respectively. The following condition should be met: T
m1
, T
m2
>T
m
>T
eu1
, T
eu2
. After cleaning of Sub
1
and Sub
2
, JM is deposited on the bonding sides of Sub
1
and Sub
2
. After preliminary bonding by applying force to press the bonding surfaces together at room temperature, high temperature bonding is subsequently performed, during which the temperature is ramped up to a temperature equal to or higher than T
m
. During cooling, JM solidifies first, after which two eutectic alloys solidify.
According to an embodiment of the invention, a method for integrating two heterogeneous materials or forming a compliant composite substrate includes the steps of: (a) selecting a first substrate material (Sub
1
); (b) selecting a second substrate material (Sub
2
); (c) selecting a joint metal (JM) with a melting point of T
m
; wherein JM and Sub
1
form a first eutectic alloy at a first eutectic temperature T
eu1
while JM and Sub
2
form a second eutectic alloy at a second eutectic temperature T
eu2
; with the condition that T
m
>T
eu1
and T
eu2
; (d) depositing JM on a side of Sub
1
to form a first intermediate substrate; (e) depositing JM on a side of Sub
2
to form a second intermediate substrate; (f) forming a substrate pair by combining said first and second intermediate substrates such that said sides of Sub
1
and Sub
2
having JM on them are against each other; (g) ramping the temperature of said substrate pair up at least T
m
, passing through T
eu1
and T
eu2
; and (h) cooling, after step (g), said substrate pair to form said compliant composite substrate.
REFERENCES:
patent: 3987217 (1976-10-01), Greeson et al.
patent: 3994430 (1976-11-01), Cusano et al.
patent: 4033503 (1977-07-01), Fletcher et al.
patent: 41
Lo Yu-Hwa
Ng Tuoh-Bin
Zhu Zuhua
Foley Hoag & Eliot LLP
Nova Crystals, Inc.
Ryan Patrick
Stoner Kiley
LandOfFree
Semiconductor eutectic alloy metal (SEAM) technology for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor eutectic alloy metal (SEAM) technology for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor eutectic alloy metal (SEAM) technology for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2481455