Semiconductor element and method for fabricating the same

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction

Reexamination Certificate

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C438S314000, C438S317000, C438S318000

Reexamination Certificate

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11062851

ABSTRACT:
A heterojunction bipolar transistor comprises a collector layer, a base layer formed on the collector layer and an emitter layer formed on the base layer. The emitter layer includes a first semiconductor layer covering the entire top surface of the base layer and a second semiconductor layer formed on a predetermined part of the first semiconductor layer. An inactivated region is formed, by ion implantation, in a region of the collector layer located below the base layer except for a part thereof corresponding to the second semiconductor layer. The edge of the inactivated region is located away from the edge of the second semiconductor layer, and a region of the first semiconductor layer between the edge of the inactivated region and the edge of the second semiconductor layer is depleted.

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patent: 6191021 (2001-02-01), Fuller et al.
patent: 6806129 (2004-10-01), McHugo et al.
patent: 6841795 (2005-01-01), Taylor et al.
patent: 6858509 (2005-02-01), Delage et al.
patent: 6998320 (2006-02-01), Krueger et al.
patent: 6-232148 (1994-08-01), None

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