Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-03-10
2003-05-27
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S106000, C438S610000, C438S611000, C438S612000, C438S613000, C438S614000, C257S678000
Reexamination Certificate
active
06569752
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor element provided with a layer of intermetallic compound and a fabricating method thereof.
2. Description of Related Art
In surface mount technology (SMT) of a semiconductor element, it is very important to implement soldering process with reliability. In the SMT, solder that has been largely used is eutectic alloy of tin (Sn) and lead (Pb) (Sn: Pb=63:37% by weight). In addition, so as to cope with finer pitches, ternary alloy of composition of Sn—Pb—Bi (8% by weight) has been used too.
The primary reason for employing alloys as solder material is that, not mentioning to a large strength and corrosion resistance, alloys have a lower melting temperature compared with those of component simple elements. The alloys can be roughly distinguished into three categories of solid solutions, eutectic compounds and intermetallic compounds.
The solders that are provided in JIS Z 3282 include, other than the aforementioned solders of compositions of Sn—Pb and Sn—Pb—Bi, solders of compositions of such as Bi—Sn, Sn—Pb—Ag, Sn—Ag, Sn—Sb, Pb—Ag and Pb—Ag—Sn.
Among these solders, lead based solders are gradually declining in use. That is, Pb has a plurality of radioisotopes. These isotopes are intermediate or final products of decay series of uranium (U) or thorium (Th), and accompany &agr;-decay that emits He atoms. Accordingly, in the solders, &agr;-rays inevitably appear. The &agr;-rays, upon reaching a CMOS element for instance, cause soft error problems to occur. Further, Pb, upon flowing out into soil, might be eluted due to acid rain to have adverse affect on the environment. From these reasons, use of solders containing lead (Pb) is declining.
Instead of these Pb based solders, Sn based solders (Sn—Ag solder for instance) that do not contain Pb are considered promising.
A method for fabricating a semiconductor device in which semiconductor element is surface-mounted with Sn—Ag based solder will be explained with reference to
FIGS. 19
to
23
.
First, as shown in
FIG. 19
, after forming an aluminum electrode pad
22
on a semiconductor substrate
21
consisting of silicon, while leaving an opening at a center portion of the aluminum electrode pad
22
, passivation is implemented to
20
form a passivation film
23
. Then, as shown in
FIG. 20
, films of titanium (Ti)
24
, nickel (Ni)
25
and palladium (Pd)
26
are sequentially stacked in this order to form a barrier metal layer
27
.
Then, as shown in
FIG. 21
, resist
28
is coated on the barrier metal layer
27
and a portion above the aluminum electrode pad
22
is opened. Thereafter, in the opening a layer of Sn—Ag solder
29
is formed.
Next, as shown in
FIG. 22
, the resist
28
is removed and the barrier metal layer
27
is etched. Thereafter, as shown in
FIG. 23
, the layer
29
of Sn—Ag solder is reflowed to form a protruded electrode (bump)
30
. Then, the semiconductor substrate
21
is diced to form semiconductor chips. The semiconductor chip is mounted on a wiring board (a printed circuit board) by use of flip-chip mounting method to produce a semiconductor device.
However, in general, such solders as Sn—Ag based ones that are free from Pb contain much Sn compared with the Sn—Pb solder. Accordingly, when left in high temperature service circumstances, the barrier metal layer deteriorates sooner. That is, since Sn in the solder tends to intrude and diffuse into the barrier metal layer (Ni layer), the barrier metal layer tends to deteriorate to cause lowering of reliability of a solder joint between the semiconductor element (chip) and the wiring board. This is a problem.
Further, there is a method in which Cu or Ni as the barrier metal is plated thicker to solve the aforementioned problems. However, in this method, number of step increases to cause problems.
Thus, so far, with solders that do not contain lead (Pb), highly reliable solder joint has not been formed.
SUMMARY OF THE INVENTION
The present invention has been carried out to solve these problems. The object of the present invention is to provide a semiconductor element of high reliability and a fabricating method thereof, in which solders that do not contain Pb are used as joining means.
A first aspect of the present invention is a semiconductor element. The semiconductor element comprises a semiconductor substrate, a wiring pad formed on the semiconductor substrate, a layer of barrier metal formed on the wiring pad, an intermetallic compound Ag
3
Sn formed on the barrier metal layer, and a protruded electrode. The protruded electrode consists of a low-melting metal formed on the intermetallic compound Ag
3
Sn.
In the first aspect, the intermetallic compound Ag
3
Sn is formed in a layer or segregated in particles.
Further, in the present first aspect, the layer of barrier metal is selected from single layers and laminate layers of titanium (Ti), chromium (Cr), copper (Cu), nickel (Ni), palladium (Pd), gold (Au), tungsten (W), titanium nitride (TiN), tantalum (Ta), niobium (Nb), tantalum nitride (TaN), mixtures thereof and compounds thereof. In particular, due to excellent adherence with the intermetallic compound Ag
3
Sn, a laminate layer stacked titanium (Ti) film, nickel (Ni) film and palladium (Pd) film in this order is preferably used.
The low-melting metal is selected from tin (Sn), silver (Ag), bismuth (Bi), zinc (Zn), indium (In), antimony (Sb), copper (Cu) and germanium (Ge), mixtures thereof and compounds thereof. To be specific, binary mixtures (alloys) such as eutectic Sn—Ag or the like can be cited, and ternary alloys such as Sn—Ag—Bi or the like also can be used.
A second aspect of the present invention is a fabricating method of a semiconductor element. The present method comprises the steps of forming a wiring pad on a semiconductor substrate, of forming a barrier metal layer on the wiring pad, of forming a layer of intermetallic compound Ag
3
Sn on the barrier metal layer, and of forming a protruded electrode. The protruded electrode consists of low-melting metal formed on the layer of intermetallic compound Ag
3
Sn.
In the present fabricating method of the semiconductor element, the layer of barrier metal is selected from single layers and laminate layers of titanium (Ti), chromium (Cr), copper (Cu), nickel (Ni), palladium (Pd), gold (Au), tungsten (W), titanium nitride (TiN), tantalum (Ta), niobium (Nb), tantalum nitride (TaN), mixtures thereof, and compounds thereof. In particular, due to excellent adherence with the intermetallic compound Ag
3
Sn, a laminate layer stacked titanium (Ti) film, nickel (Ni) film, and palladium (Pd) film in this order is preferably used.
The low-melting metal is selected from tin (Sn), silver (Ag), bismuth (Bi), zinc (Zn), indium (In), antimony (Sb), copper (Cu) and germanium (Ge), mixtures thereof and compounds thereof. To be specific, binary mixtures (alloys) such as eutectic Sn—Ag or the like can be cited, and ternary alloys such as Sn—Ag—Bi or the like also can be used.
A third aspect of the present invention is a fabricating method of the semiconductor element, comprising the steps of forming a wiring pad on a semiconductor substrate, of forming a layer of barrier metal on the wiring pad, of forming a metallic layer containing silver (Ag) on the layer of barrier metal, of forming a layer of low-melting metal containing tin (Sn) on the metallic layer containing Ag and of melting the layer of low-melting metal containing Sn to form a protruded electrode, thereby forming an intermetallic compound Ag
3
Sn in the neighborhood of an interface of the metallic layer containing Ag and the layer of low-melting metal containing Sn.
In the third aspect, the intermetallic compound Ag
3
Sn is formed in a layer. That is, when solder containing Sn is used as low-melting metal, during the solder reflow procedures, a lower layer containing Ag is also melted. Accordingly, the layer of intermetallic compound Ag
3
Sn is formed in the layer containing Ag, that is, between the solder layer and the barrier metal layer.
In
Ezawa Hirokazu
Homma Soichi
Inoue Hiroaki
Miyata Masahiro
Tokuoka Tsuyoshi
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Lee Jr. Granvill D
Smith Matthew
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