Semiconductor dynamic memory and related refreshing system

Static information storage and retrieval – Read/write circuit – Data refresh

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365149, G11C 700

Patent

active

041061080

ABSTRACT:
A semiconductor memory is provided with means for refreshing the memory. Interrupt requests generated by the memory initiate refreshing cycles, which take place in parallel with normal read/write memory operations. The memory is divided in two parts or blocks. If the central processor unit assigns a cycle for read/write operation to one of the two blocks, the same cycle is utilized to recharge or refresh a row of storage elements of the integrated units which constitute the other block of the memory. Refreshing is regulated by low priority interrupt requests and, if not responded to, by high priority interrupt requests, which are mandatory.

REFERENCES:
patent: 3737879 (1973-06-01), Greene et al.
patent: 3748651 (1973-07-01), Mesnik
patent: 3786437 (1974-01-01), Croxon
patent: 3800295 (1974-03-01), Anderson et al.

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