Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2008-11-20
2011-11-15
Clark, Jasmine (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S773000, C257S698000, C257SE25017, C257SE23145, C257SE21549, C257SE21577, C257SE21585
Reexamination Certificate
active
08058732
ABSTRACT:
Disclosed are semiconductor die structures that enable a die having a vertical power device to be packaged in a wafer-level chip scale package where the current-conducting terminals are present at one surface of the die, and where the device has very low on-state resistance. In an exemplary embodiment, a trench and an aperture are formed in a backside of a die, with the aperture contacting a conductive region at the top surface of the die. A conductive layer and/or a conductive body may be disposed on the trench and aperture to electrically couple the backside current-conducting electrode of the device to the conductive region. Also disclosed are packages and systems using a die with a die structure according to the invention, and methods of making dice with a die structure according to the invention.
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International Search Report and Written Opinion of the International Searching Authority for PCT Application No. PCT/US2009/061879, mailed Jun. 1, 2010, 10 pages.
Dikshit Rohit
Gruenhagen Michael D.
Ho Ihsiu
Kim Suku
Larsen Mark
Clark Jasmine
Fairchild Semiconductor Corporation
Kilpatrick Townsend & Stockton LLP
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