Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Housing or package filled with solid or liquid electrically...
Reexamination Certificate
2001-08-21
2003-06-03
Paladini, Albert W. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Housing or package filled with solid or liquid electrically...
C257S738000, C257S774000, C257S778000, C257S788000, C257S786000, C257S787000
Reexamination Certificate
active
06573592
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to ball grid array (“BGA”) semiconductor packages and methods of attaching, encapsulating and evaluating the same. In particular, the present invention relates to interposers for mounting a BGA semiconductor die to a carrier substrate with which the BGA semiconductor die is in electrical communication, such that an underfill encapsulant may be flowed between the BGA semiconductor die and the interposer. The BGA semiconductor die may be encapsulated within the interposer to form a complete semiconductor die package. The interposer may be constructed such that semiconductor die having different patterns of BGAs may be mounted on identical substrates without a need for substrate alteration.
BACKGROUND
Definitions: The following terms and acronyms will be used throughout the application and are defined as follows:
BGA—Ball Grid Array: An array of minute solder balls disposed on an attachment surface of a semiconductor die, interposer, or semiconductor package wherein the solder balls are reflowed for simultaneous attachment and electrical communication with a substrate, such as a printed circuit board.
COB—Chip on Board: The techniques used to attach semiconductor dice to substrates, including flip chip attachment, wirebonding, and tape automated bonding (“TAB”).
Flip Chip: A semiconductor die or chip having bumped bond pads on the active surface of the die and is intended for facedown mounting.
Flip Chip Attachment: A method of attaching a semiconductor die to a substrate in which the die is flipped so that the connecting conductor pads on the active surface of the die are set on mirror image pads on the substrate and bonded by reflowing solder.
Glob Top: A glob of encapsulant material (usually epoxy or silicone or a combination thereof) surrounding a semiconductor die in the COB assembly process.
Low Viscosity Encapsulant: An encapsulant material suitable for use as an underfill (usually epoxy or silicone or a combination thereof) which, prior to curing, has a relatively low viscosity, such that it may be directed to flow into and through an array of connecting bond pads of a semiconductor die attached to a substrate, with substantially no voids left therein, without the use of a pressure differential.
PGA—Pin Grid Array: An array of small pins extending substantially perpendicularly from the major plane of a semiconductor die, interposer, or semiconductor package, wherein the pins conform to a specific arrangement for attachment to a substrate.
SLICC—Slightly Larger than Integrated Circuit Carrier: An array of minute solder balls disposed on an attachment surface of a semiconductor die, interposer, or semiconductor package similar to a BGA, but having a smaller solder ball pitch and diameter than a BGA.
Flip chip attachment consists of attaching a semiconductor die, generally having a BGA, a SLICC or a PGA, to a printed circuit board or other substrate. With the BGA or the SLICC, the solder ball arrangement on the semiconductor die must be a mirror image of the connecting bond pads on the substrate such that a precise connection is made. The semiconductor die is bonded to the substrate by reflowing the solder balls. With the PGA, the pin arrangement of the semiconductor die must be a mirror image of the pin recesses on the substrate. After insertion, the semiconductor die is generally bonded by soldering the pins into place.
Once the semiconductor die has been flip chip attached to the substrate, an underfill encapsulant is generally disposed between the semiconductor die and the substrate. The underfill encapsulant is generally a fluid epoxy that may be flowed into the connection space between the semiconductor die and substrate, laterally between the soldered electrical connections, Typically, the underfill encapsulant is allowed to flow until fillets of underfill encapsulant are formed around the sides of the semiconductor die. In order to form the fillets and to prevent the underfill encapsulant from flowing further and covering other portions of the substrate, thereby reducing the “real estate” (die surface area) used by the semiconductor die connection, it has been necessary to use underfill encapsulants which have a relatively high viscosity.
Once cured, the underfill encapsulant serves multiple functions. It compensates for the difference in coefficient of thermal expansion between the substrate and the semiconductor die. It also protects the solder bumps from environmental contaminants. However, flowing an underfill encapsulant with relatively high viscosity into the connection space raises further problems. More viscous underfill encapsulants are often unable to flow in between all the connections within the connection space. Empty areas, or voids, occurring when bubbles are trapped within the connection space are common. Delaminations, where the high viscosity underfill encapsulant fails to wet and adhere to a surface, also occur. Such defects can lead to the early failure of the semiconductor die when in operation.
Attempts have been made to reduce the number of defects in the underfilling process. Typically, a vacuum is applied to facilitate the flow of underfill encapsulant into the connection space. Alternatively, or in addition to the application of a vacuum, a highly viscous underfill encapsulant may be injected under elevated pressure. Even where these techniques are used, defects can still occur. Applying a vacuum or elevated pressure can stress the solder connections, resulting in weakening or breakage thereof. The manufacturing cost of the package is also increased as additional processing steps as well as additional equipment for maintaining and applying the pressure differences are required.
With wire-bond or TAB adapted dies, a molded carrier ring may be used to protect a portion of the leads as they extend out from the semiconductor die. This is accomplished by placing a molded carrier ring around the die, with the leads protruding therefrom, then filling the molded carrier ring with an encapsulant material. The ends of the leads protruding from the ring are available for testing or connection to a substrate. While the die itself is protected, the exposed lead ends remain susceptible to breakage, moisture and contamination. Even this limited protection cannot be used with flip chip adapted semiconductor die, as the connection pads do not extend out parallel to the plane of the die.
Therefore, it would be advantageous to develop an apparatus and method that allow for use of a relatively low viscosity underfill encapsulant with flip chip attachment for semiconductor dice, reducing the rate of underfill defects while eliminating the need for a vacuum or pressurized injection. It would further be advantageous for such an apparatus and method to provide a standard connection pattern allowing for semiconductor dice having different connection patterns to be attached to a common substrate having a single set of connection terminals.
BRIEF SUMMARY OF THE INVENTION
The present invention includes apparatus and methods for preparing semiconductor packages, or assemblies. An interposer having a perimeter wall surrounding a recess on an upper surface thereof includes an array of electrical connection pads within the recess. A semiconductor die can be flip chip attached, making electrical contact through the electrical connection pads to a number of other electrical contacts accessible elsewhere on the interposer, preferably on the lower surface thereof. A low viscosity underfill encapsulant is disposed between the semiconductor die and the interposer by flowing into the space between the die and the perimeter wall of the interposer. The underfill encapsulant flows throughout the connection array by capillary action, without the assistance of either positive or negative pressure. The underfill encapsulant may be flowed until the underfill is complete, or until the entire semiconductor die is encapsulated within the interposer.
REFERENCES:
patent: 5019673 (1991-05-01), Juskey et al.
patent: 5258648 (1993-11-01),
Chambliss Alonzo
Micro)n Technology, Inc.
Paladini Albert W.
TraskBritt
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