Semiconductor die package processable at the wafer level

Details Semiconductor die package processable at the wafer level Semiconductor die package processable at the wafer level

2005-03-15

2005-03-15

Wilson, Allan R. (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With contact or lead

C257S698000, C257S737000

Reexamination Certificate

active

06867489

ABSTRACT:
A method for forming a semiconductor die package is provided. The method comprises: forming a semiconductor die including a source contact region and a gate contact region at a first side and a drain contact region at a second side; forming a first conductive path on the semiconductor die extending from the source contact region at the first side to the second side; forming a second conductive path on the semiconductor die extending from the gate contact region at the first side to the second side; and attaching the semiconductor die to a circuit substrate so that the second side is proximate to the circuit substrate and the first side is distal to circuit substrate.

REFERENCES:
patent: 5814884 (1998-09-01), Davis et al.
patent: 6355542 (2002-03-01), Andoh
patent: 6645791 (2003-11-01), Noquil et al.

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