Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
2007-06-19
2007-06-19
Smith, Matthew (Department: 2823)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S396000, C438S397000, C438S957000, C438S508000, C257SE21008, C257SE21011, C257SE21021
Reexamination Certificate
active
11027056
ABSTRACT:
Semiconductor devices with copper interconnections and MIM capacitors and methods of fabricating the same are provided. The device includes a lower electrode composed of a first copper layer. A first insulation layer covers a lower electrode. A window is formed in the first insulation layer to expose a portion of the lower electrode. A capacitor includes a lower barrier electrode, a dielectric layer, and an upper barrier electrode, which are sequentially formed to cover a sidewall and a bottom of the window. An intermediate electrode composed of a second copper layer fills a remaining space of an inside of the capacitor. A second insulation layer is formed on the intermediate electrode. A connection hole is formed in the second insulation layer to expose a portion of the intermediate electrode. A connection contact plug composed of a third copper layer fills the connection hole. An upper layer composed of a fourth copper layer is formed on the connection contact plug to be connected to the connection contact plug.
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Armacost, M., et al., A High Reliability Metal Insulator Metal Capacitor for 0.18 Copper Technology, IEEE, 2000.
Mills & Onello LLP
Pham Thanh V.
Samsung Electronics Co,. Ltd.
Smith Matthew
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