Semiconductor devices having torsional stresses

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S396000, C257S397000, C257S506000, C257S524000, C257SE29020

Reexamination Certificate

active

07462916

ABSTRACT:
A FET structure is provided in which at least one stressor element provided at or near one corner of an active semiconductor region applies a stress in a first direction to one side of a channel region of the FET to apply a torsional stress to the channel region of the FET. In a particular embodiment, a second stressor element is provided at or near an opposite corner of the active semiconductor region to apply a stress in a second direction to an opposite side of a channel region of the FET, the second direction being opposite to the first direction. In this way, the first and second stressor elements cooperate together in applying a torsional stress to the channel region of the FET.

REFERENCES:
patent: 6717216 (2004-04-01), Doris et al.
patent: 6867433 (2005-03-01), Yeo et al.
patent: 6884667 (2005-04-01), Doris et al.
patent: 6974981 (2005-12-01), Chidambarrao et al.
patent: 7018551 (2006-03-01), Beintner et al.
patent: 7052964 (2006-05-01), Yeo et al.
patent: 7221024 (2007-05-01), Chidambarrao et al.
patent: 2004/0113174 (2004-06-01), Chidambarrao et al.
patent: 2005/0130358 (2005-06-01), Chidambarrao et al.
patent: 2006/0057787 (2006-03-01), Doris et al.
U.S. Appl. No. 11/163,686, filed Oct. 27, 2005 entitled “Transistor Having Dielectric Stressor Elements for Applying In-Plane Shear Stress”.

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