Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1988-11-15
1990-04-03
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Bad bit
365201, G11C 1134
Patent
active
049146327
ABSTRACT:
A plurality of word drivers are provided corresponding to a plurality of word lines. A switch band is provided between the plurality of word drivers and a plurality of row decoders. Each row decoder is connected to four word drivers through the switch band. The state of connection between each of the row decoders and the word driver can be changed by the switch band. A spare row decoder, four word drivers and four spare word lines are provided. Any of the row decoders can be replaced with the spare row decoder. Consequently, four spare word driver and four spare word lines can be selected instead of the four word drivers and four word lines connected to the row decoder.
REFERENCES:
patent: 4494220 (1982-11-01), Dumbri et al.
patent: 4641286 (1984-02-01), Shimotori et al.
patent: 4658379 (1984-10-01), Fujishima et al.
patent: 4694432 (1985-03-01), Miyatake et al.
R. Cenker, "A Fault-Tolerant 64K Dynamic Random-Access Memory", IEEE Transactions on Electron Devices, vol. ED-26, No. 6, Jun. 1979.
Asakura Mikio
Fujishima Kazuyasu
Matsuda Yoshio
Mitsubishi Denki & Kabushiki Kaisha
Popek Joseph A.
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