Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-04-30
2004-05-11
Ngô, Ngân V. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S263000, C257S273000, C257S279000, C257S472000, C257S593000
Reexamination Certificate
active
06734476
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to power semiconductor devices and circuits, and more particularly, to a power semiconductor device having an epitaxial III-V layer.
Various types of semiconductor devices have been used for power handling: junction field effect transistors (JFETs), field-controlled diodes, power metal oxide-semiconductor field effect transistors (power MOSFETs), power metal semiconductor (MESFET), bipolar transistors, MOS gated thyristors, insulated gate transistors (IGTs) including insulated bipolar gate transistors (IGBTs), vertical field effect transistors (VFETs), Schottky diodes (two terminal devices), pn diodes, and the like. Power devices ideally have low forward voltage drop, high switching speed, and low control power consumption. These devices and others that are suitable for power handling, e.g., switch operations, are referred to collectively herein as “power semiconductor devices,” “power devices,” “power MOSFET,” or “power transistors.”
The VFETs are commonly used particularly for high frequency, high power application. They provide increased operation frequency and unit cell density by orienting the current flow in the vertical direction. They also minimizes parasitic capacitance and conductance from the substrate and provides higher breakdown voltage by passing the current flow in the bulk of the material instead of the device surface. Further, since the ohmic contacts and device channel are aligned vertically, the current density per unit of surface area is much higher than in a lateral FET. This means that for the same surface area VFETs will have much higher power than lateral FETs. Many recent VFETs use gallium arsenide (GaAs) or group III-V compound, which has higher electron mobility than silicon, as the semiconductor material to reduce the on-resistance.
The VFETs and other GaAs power devices like Schottky diodes, pn-diodes with breakdown voltages greater than 20 volts and current ratings of 1A and more may require usage of lightly doped N− epitaxial layers. The breakdown voltage (BV), is determined mainly by the thickness and doping concentration of the N− epitaxial layer. The BV is also affected by the geometrical factors of the p-n junctions in the devices. The composition of the passivation layers, the radius of curvature of the junction, the geometrical shape of the junction, the use of junction termination structures like guard rings, field plates, gradients of doping and combination thereof also influence the BV.
BRIEF SUMMARY OF THE INVENTION
In one embodiment, a power semiconductor device includes a substrate of first conductivity having a dopant concentration of a first level. The substrate is a group III-V compound material. A transitional layer of first conductivity is epitaxially grown over the substrate. The transitional layer has a dopant concentration of a second level and is a group III-V compound material. An epitaxial layer of first conductivity is grown over the transitional layer and has a dopant concentration of a third level. Electrical currents flow through the transitional and epitaxial layers when the device is operating.
The power device is configured to have a breakdown voltage of greater than 20 volts. The power device is configured to have a breakdown voltage of greater than 100 volts and conduct more than 1 ampere. The power device is configured to have a breakdown voltage of greater than 600 volts.
In another embodiment, a method of manufacturing a power semiconductor device includes providing a substrate of first conductivity having a dopant concentration of a first level, the substrate being a group III-V compound material. The method further includes epitaxially growing a transitional layer of first conductivity over the substrate, the transitional layer having a dopant concentration of a second level and being a group III-V compound material; and epitaxially growing an epitaxial layer of first conductivity over the transitional layer and having a dopant concentration of a third level, wherein the power device is configured to allow electrical currents to flow vertically through the transitional and epitaxial layers when the device is operating.
REFERENCES:
patent: 4129879 (1978-12-01), Tantraporn et al.
patent: 5336383 (1994-08-01), Allington
patent: 5578512 (1996-11-01), Tao
patent: 5624860 (1997-04-01), Plumton et al.
patent: 5745857 (1998-04-01), Maen et al.
patent: 5837570 (1998-11-01), Asano
patent: 5910665 (1999-06-01), Plumton et al.
patent: 6043125 (2000-03-01), Williams et al.
patent: 6156611 (2000-12-01), Lan et al.
Moessner Stefan
Weyers Markus
Ixys Corporation
Ngo Ngan V.
Townsend and Townsend / and Crew LLP
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