Semiconductor devices having active elements with raised...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

Reexamination Certificate

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C257S517000, C257SE27053, C438S758000

Reexamination Certificate

active

07923810

ABSTRACT:
A semiconductor device may include a semiconductor region of a semiconductor substrate wherein a P-N junction is defined between the semiconductor region and a bulk of the semiconductor substrate. An insulating isolation structure in the semiconductor substrate may surround sidewalls of the semiconductor region. An interlayer insulating layer may be on the semiconductor substrate, on the semiconductor region, and on the insulating isolation structure, and the interlayer insulating layer may have first and second spaced apart element holes exposing respective first and second portions of the semiconductor region. A first semiconductor pattern may be in the first element hole on the first exposed portion of the semiconductor region, and a second semiconductor pattern may be in the second element hole on the second exposed portion of the semiconductor region. A surface portion of the first semiconductor pattern opposite the semiconductor substrate and a surface portion of the second semiconductor pattern opposite the semiconductor substrate may have a same conductivity type. Related methods are also discussed.

REFERENCES:
patent: 6171905 (2001-01-01), Morita et al.
patent: 6965150 (2005-11-01), Higashida et al.
patent: 2002/0031916 (2002-03-01), Ohkubo et al.
patent: 2006/0284237 (2006-12-01), Park et al.
patent: 10-189888 (1998-07-01), None
patent: 2001-326354 (2001-11-01), None
patent: 2007-005785 (2007-01-01), None
patent: 1020010065328 (2001-07-01), None
patent: 1020060133394 (2006-12-01), None

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