Semiconductor devices having a gate electrode and methods of...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

Reexamination Certificate

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Details

C257SE29111, C257S288000, C257S330000, C257SE29126, C257SE29128, C257SE29132, C257SE29133, C257SE29134, C257SE29137, C257SE29150, C438S589000

Reexamination Certificate

active

07847367

ABSTRACT:
An integrated circuit device includes an integrated circuit substrate and a first gate pattern on the substrate. A non-conductive barrier layer pattern is on the first gate pattern. The barrier layer pattern has openings at selected locations therein extending to the first gate pattern. A second gate pattern is on the barrier layer pattern and extends into the opening in the barrier layer pattern to electrically connect the second gate pattern to the first gate pattern.

REFERENCES:
patent: 6930363 (2005-08-01), Jeng et al.
patent: 7195966 (2007-03-01), Park et al.
patent: 2007/0063257 (2007-03-01), Hur et al.
patent: 1020000061287 (2000-10-01), None
patent: 1020040001868 (2004-01-01), None
patent: 1020050052027 (2005-06-01), None

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