Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2005-12-27
2009-12-29
Smith, Zandra (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S618000, C438S708000
Reexamination Certificate
active
07638426
ABSTRACT:
Shorting of a copper line with an adjacent line in a semiconductor device during chemical mechanical polishing may be prevented and thus reliability of the semiconductor device may be improved, when the semiconductor device includes a substrate, an interlayer insulating layer formed on the substrate and having a dual trench, and a copper line formed to fill the dual trench, wherein the dual trench includes a first trench inclined at a first angle with respect to the substrate, and a second trench connected to the first trench and inclined at a second angle that is smaller than the first angle with respect to the substrate.
REFERENCES:
patent: 6261947 (2001-07-01), McTeer
patent: 6740599 (2004-05-01), Yamazaki et al.
patent: 7241684 (2007-07-01), Cho
patent: 1998-026825 (1998-07-01), None
(Method of Forming a Contact Hole in a Semiconductor Device); Patent Abstract of Korea; Publication No. 1993-026825; Publication Date: Jul. 15, 1998.
Dongbu Electronics Co. Ltd.
Fortney Andrew D.
Perkins Pamela E
Smith Zandra
The Law Offices of Andrew D. Fortney
LandOfFree
Semiconductor devices and methods of manufacturing the same does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor devices and methods of manufacturing the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor devices and methods of manufacturing the same will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4070061