Semiconductor device with stress reducing trench fill...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor

Reexamination Certificate

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Details

C257S314000, C257S324000, C257SE29066, C257SE29162, C365S185050, C365S185170

Reexamination Certificate

active

07453106

ABSTRACT:
A semiconductor device includes: a semiconductor substrate formed with an active region and an isolation region and having a trench formed in the isolation region; an isolation insulating film embedded in the trench of the semiconductor substrate; and semiconductor nanocrystals buried in the isolation insulating film. The coefficient of linear expansion of the semiconductor nanocrystal is closer to that of the semiconductor substrate rather than that of the isolation insulating film, so that stress applied to the active region after a thermal treatment or the like is reduced.

REFERENCES:
patent: 6653200 (2003-11-01), Olsen
patent: 2006/0050559 (2006-03-01), Sakui et al.
patent: 2004-530304 (2004-09-01), None
patent: WO 02/095818 (2002-11-01), None
V. Chan et al., “High Speed 45nm Gate Length CMOSFETs Integrated Into a 90 nm Bulk Technology Incorporating Strain Engineering”IEDM Tech. Dig. pp. 77-80 (2003).

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