Semiconductor device with strain relieving bump design

Details Semiconductor device with strain relieving bump design Semiconductor device with strain relieving bump design

2003-07-31

2004-09-14

Gurley, Lynne A. (Department: 2812)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S613000, C438S622000

Reexamination Certificate

active

06790759

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to bumped semiconductor components, and more particularly to bumped semiconductor components equipped with redistribution circuitry and suitable for wafer level BGA packaging.
BACKGROUND OF THE INVENTION
Semiconductor components such as die, chip scale packages, ball grid arrays (BGAs), and wafers frequently include terminal contacts in the form of metal bumps. Components equipped with such contacts are often referred to as “bumped” components.
FIG. 1
illustrates one type of prior art flip chip semiconductor package. The package
10
comprises a semiconductor die
12
and an array of bumped contacts
14
on the circuit side of the die
12
. The bumped contacts
14
allow the package
10
to be surface mounted to a substrate, such as a printed circuit board (PCB). Typically, the bumped contacts
14
are made of solder, which allows the package
10
to be bonded to a substrate using a solder reflow process.
The die
12
contained in the package
10
includes a series of contact pads
20
which are in electrical communication with the bumped contacts
14
. The die
12
also includes internal conductors
22
which are in electrical communication with the contact pads
20
, and with various semiconductor devices and integrated circuits as may be formed on or in the die
12
. The die
12
also contains first
16
, second
24
and third
38
passivation layers. Typically, the first passivation layer is a material such as plasma oxynitride (PON), and the second and third passivation layers are benzocyclobutene (BCB). One or more openings
26
may be provided through passivation layers
24
and
16
to allow a redistribution conductor
36
(discussed in greater detail below) to be in physical contact with the contact pads
20
.
For the sake of clarity, it is to be noted here that the PON layer is typically deposited as two separate layers, one of plasma oxide and the other of plasma nitride. It is treated as a single passivation layer here because deposition of the second layer does not require any intervening processing steps. By contrast, the deposition of each of the BCB layers requires intervening photo steps; hence, these layers are treated as distinct layers, even though their chemical composition may be similar or even identical.
The redistribution conductor
36
is formed on a surface of the second passivation layer
24
. The redistribution conductor
36
is sputtered to a thickness typically less than 1 &mgr;m and is in electrical communication with the contact pads
20
and the bump contacts
14
. The third passivation layer
38
covers the redistribution conductor
36
. The redistribution conductor may be used, for example, to redistribute the signals from standard wire contact pads
20
located at the die perimeter to pads of an area array, such as a ball grid array (BGA). As shown in
FIG. 1
, the redistribution conductor
36
typically requires an under bump metallization (UBM)
44
for each bumped contact
14
to facilitate bonding of the bumped contact
14
to the redistribution conductor
36
.
In semiconductor devices in which a flip-chip die is attached to a PCB or other substrate, a substantial amount of stress exists through the entire joint connecting the die to the substrate. This stress arises in part from coefficient of thermal expansion (CTE) differentials between the die and the substrate, with the result that varying amounts of stress and strain are applied to the joint regions as the die and substrate are exposed to thermal cycling. Over time, these stresses can result in mechanical and/or electrical failure of the joint. Accordingly, it has become a common practice in some flip-chip applications to provide an additional underfill material between the third passivation layer
38
and the substrate. This additional underfill material, which typically has a CTE coefficient somewhere between the CTE coefficients of the third passivation layer and substrate, buffers the large CTE differential stress between the third passivation layer and the substrate, thereby reducing or eliminating solder fatigue failure.
In a device such as that shown in
FIG. 1
, the second and third passivation layers are rigid and serve to mechanically reinforce the redistribution conductors and to clamp them in place. Consequently, a substantial amount of the CTE differential stresses in devices of this type are borne by the solder contacts
14
and by the second
24
and third
38
passivation layers. Indeed, in devices of this type, the redistribution conductors are typically too thin to withstand any significant amount of stress by themselves and tend to break if exposed to significant stresses, thus resulting in electrical failures. While the use of three passivation layers is advantageous insofar as it mechanically reinforces the redistribution conductors, it also has some drawbacks. For example, the addition of a third passivation layer increases the complexity and manufacturing cost of the device, while also making it more difficult to rework the device or to perform electrical probing on the redistribution conductor.
There is thus a need in the art for a die equipped with a redistribution conductor which is suitable for flip-chip applications and which does not require a third passivation layer or an underfill material. There is also a need in the art for a die fitted with a redistribution conductor that can relieve differential CTE stresses. These and other needs are met by the methodologies and devices disclosed herein and hereinafter described.
SUMMARY OF THE INVENTION
In one aspect, a device is provided which comprises (a) a semiconductor die or other substrate having a contact pad thereon, (b) a redistribution conductor having a base portion which is in electrical communication with the contact pad, and having a convoluted, laterally extending portion, and (c) a (typically organic) passivation layer disposed between the laterally extending portion and the die, and wherein the laterally extending portion preferably forms a frangible bond to the passivation layer. The device may also comprise a bumped contact in electrical communication with the redistribution conductor. The laterally extending portion may be serpentine or shaped like a sine wave, and preferably changes direction at least once, more preferably at least twice, and most preferably at least three times in going from the base to the bumped contact. The laterally extending portion has an average minimum thickness of at least about 3 microns, preferably within the range of about 8 to about 16 microns, and more preferably within the range of about 10 to about 14 microns, as measured along an axis extending through the center of, and orthogonal to, the laterally extending portion. The device may further comprise a PCB substrate in contact with said bumped contact, in which case the PCB substrate is preferably separated from the redistribution conductor by an open space rather than an underfill. The device preferably also comprises a dewetting agent disposed on surfaces of the laterally extending portion of the redistribution conductor. This dewetting agent, which is preferably sufficiently conductive so as to permit probing of the conductor and is typically about 200 nm in thickness, serves to prevent solder from wetting the redistribution conductor beyond the bump contact region, hence confining the solder bump to an area directly above the bump pad. The dewetting agent can be, but is not limited to, one or more of the materials (e.g., TiW) used as a seed metal for electroplating the redistribution conductor metal.
In another aspect, a device is provided which comprises (a) a semiconductor substrate (which may be, for example, a wafer or die) having a contact pad, (b) a passivation layer, (c) a redistribution conductor having a base portion which is in electrical communication with the die contact, and a laterally extending portion which extends over the passivation layer, and (d) a release layer disposed between the passivation layer and the laterally

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