Semiconductor device with staggered octagonal electrodes and...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S696000, C257S698000, C257S208000, C257S203000, C257S784000, C257S673000, C257S674000

Reexamination Certificate

active

06798077

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and more particularly to a semiconductor device with staggered arrangement in three lines on the peripheral part of the surface of a semiconductor pellet.
DESCRIPTION OF THE RELATED ART
FIGS. 8 and 9
show the configuration of an electrode with staggered arrangement on the peripheral part of the surface of a semiconductor pellet in conventional art.
FIG. 8
shows inside and outside electrodes
402
in two lines with staggered arrangement on the peripheral part of a semiconductor pellet
401
. As shown in
FIG. 9
, an inside-line electrode
403
has a square shape and an outside-line electrode
404
has a square shape or a rectangle shape in which the ratio of the sides is from 1 to 2.
However, the pad electrode arranged conventionally has following problems:
1. Since the wiring connected to the outside-line electrode is arranged to pass between the adjacent inside-line electrodes and the width of wiring has to be narrower than the interval between the inside-line electrodes, the pad electrode cannot be used for a terminal for a large amount of electric current and a grand terminal.
2. In the wire bonding, the wiring mistake is caused in a few cases by the wrong recognition of the adjacent pad electrode for the wire-bonding pad electrode.
3. The neighboring wires contact each other in a few cases in the wire bonding by arranging the outside-line electrode near the center of the inside pad electrode.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a novel and improved semiconductor device capable of widening the width of wiring for the outside electrode and embodying the wire bonding smoothly.
To solve the problem described above, the present representative invention provides:
A semiconductor device with staggered arrangement in three lines with an inside-line electrode, a central-line electrode and an outside-line electrode on the peripheral part of the surface of a semiconductor pellet, wherein the inside-line electrode configures a hexagonal electrode having a hypotenuse on the central-line electrode side formed to cut vertically on the position at a distance of the sum of the minimum length (R) of the electrode necessary for wire-bonding and the minimum length (F) of the electrode protective film from the center of the electrode on the line connecting the center of a rough square shaped electrode with each side consisted of the sum of the minimum length (R) of the electrode necessary for wire-bonding and the minimum length (F) of the electrode protective film and the center of the adjacent central-line electrode, the central-line electrode configures a hexagonal electrode having a hypotenuse on the inside-line electrode side formed to cut vertically on the position at a distance of the sum of the minimum length (R) of the electrode necessary for wire-bonding and the minimum length (F) of the electrode protective film from the center of the electrode on the line connecting the center of a rough square shaped electrode with each side consisted of the sum of the minimum length (R) of the electrode necessary for wire-bonding and the minimum length (F) of the electrode protective film and the center of the adjacent inside-line electrode; and
a semiconductor device wherein the maximum wiring width of the outside-line electrode wired intermediately parallel to the hypotenuse of the central-line electrode and the hypotenuse of the inside-line electrode is calculated with a following expression, considering the necessary minimum conductor interval (I) between the central-line electrode and the inside-line electrode;
the maximum wiring width=(
A
2
+B
2
)
1/2
−(
R+F+I
)×2
Since the present invention can achieve the width of wiring of the outside-line electrode connected to the internal circuit, which is wider than the conventional width of wiring, the outside-line electrode can be used as the one for a large amount of electric current, for example, an electric power supply. Further, since the electrode of the inside-line electrode and the electrode of the outside-line electrode are set apart each other, in recognizing the position of the electrode at the process of wire bonding, the adjacent electrode is not wrongly recognized.


REFERENCES:
patent: 5814892 (1998-09-01), Steidl et al.
patent: 6215184 (2001-04-01), Stearns et al.
patent: 6392685 (2002-05-01), Nagahata et al.
patent: 6410990 (2002-06-01), Taylor et al.
patent: 2002/0113319 (2002-08-01), Ohno
patent: 2002/0117757 (2002-08-01), Sakamoto et al.
patent: 0588481 (1994-03-01), None
patent: 60-35524 (1985-02-01), None
patent: 60-154652 (1985-08-01), None
patent: 1-1-7549 (1989-04-01), None
patent: 3-237742 (1991-10-01), None
patent: 10-74790 (1998-03-01), None
patent: 2000-150706 (2000-05-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor device with staggered octagonal electrodes and... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device with staggered octagonal electrodes and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device with staggered octagonal electrodes and... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3269455

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.