Static information storage and retrieval – Read/write circuit – Bad bit
Patent
1983-01-28
1986-01-21
Popek, Joseph A.
Static information storage and retrieval
Read/write circuit
Bad bit
371 10, G11C 700
Patent
active
045660816
ABSTRACT:
A semiconductor memory device includes a plurality of bit memory sections, a plurality of column select circuits for selecting columns of each of the bit memory sections, and a spare memory section containing a column of spare memory cells. The first switching circuits are coupled with the column select circuits and a second switching circuit is coupled with the spare memory section. A control circuit responds to a specific address by turning off the selected one of the first switching circuits and turning on the second switching circuit.
REFERENCES:
patent: 4422161 (1983-12-01), Kressel et al.
Vernon G. McKenny, "A 5 V 64K EPROM Utilizing Redundant Circuitry", ISSCC Digest of Technical Papers, pp. 146-147, Feb. 1980.
Popek Joseph A.
Tokyo Shibaura Denki Kabushiki Kaisha
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