Semiconductor device with self-aligned contact and its manufactu

Details Semiconductor device with self-aligned contact and its manufactu Semiconductor device with self-aligned contact and its manufactu

1997-07-10

1999-08-03

Clark, Sheila V.

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

With particular signal path connections

257296, 257202, H01L 2710

Patent

active

059329017

ABSTRACT:
A semiconductor memory device comprising: a first insulating film covering the upper and side surfaces of a gate electrode; a second insulating film formed on the substrate covering the first insulating film; a pair of contact holes formed through the second insulating film and reaching the impurity diffusion regions; a conductive plug embedded in one of the contact holes; a third insulating film formed on the second insulating film covering the conductive plug, and having a first aperture on the other contact hole; a bit line formed on the third insulating film and connected to the other impurity diffusion region through the first aperture and the other contact hole; a fourth insulating film covering the upper and side surfaces of the bit line; a second aperture formed through the third insulating film in alignment with the fourth insulating film covering the side surface of the bit line; a storage electrode formed to extend over the bit line, insulated from the bit line by the third and fourth insulating films, and electrically connected to the conductive plug through the second aperture.

REFERENCES:
patent: 4443932 (1984-04-01), Mastrolanni et al.
patent: 4832789 (1989-05-01), Cochran et al.
patent: 4958318 (1990-09-01), Harai
patent: 5185282 (1993-02-01), Lee et al.
patent: 5818110 (1998-10-01), Cronin
patent: 5835337 (1998-11-01), Wantanbe et al.

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