Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1993-03-04
1995-11-28
Jackson, Jerome
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257364, 257409, 257655, H01L 2968, H01L 2978
Patent
active
054710812
ABSTRACT:
An insulated gate field-effect transistor or similar semiconductor-insulator-semiconductor structure has an increased time-dependent dielectric failure lifetime due to a reduction in the field across the gate insulator. The electric field in the gate insulator is reduced without degrading device performance by limiting the field only when the gate voltage exceeds its nominal range. The field is limited by lowering the impurity concentration in a polysilicon gate electrode so that the voltage drop across the gate insulator is reduced. In order to avoid degrading the device performance when the device is operating with nominal voltage levels, a fixed charge is imposed at the interface between the gate electrode and the gate insulator, so at a gate voltage of about the supply voltage level the response changes to exhibit less increase in the drop across the gate insulator for higher voltages. Also, the impurity level in the gate electrode may be low enough so that the gate is in deep depletion for transient increases in gate voltage, thereby limiting the drop across the gate insulator.
REFERENCES:
patent: 3571914 (1971-03-01), Lands et al.
patent: 3646527 (1972-02-01), Wada et al.
patent: 3663870 (1972-05-01), Tsutsumi et al.
patent: 3767483 (1973-10-01), Tokuyama et al.
patent: 4479831 (1984-10-01), Sandow et al.
patent: 4486943 (1984-12-01), Ryden et al.
patent: 4600933 (1986-07-01), Richman
patent: 4755865 (1988-07-01), Wilson et al.
patent: 4794433 (1988-12-01), Kamiya et al.
Lu et al, "Anomalous C-V Characteristics of Implanted Poly MOS Structure in N+/P+ Dual-Gate CMOS Technology", IEEE Elect. Dev. Ltrs, May '89.
Wong et al, "Doping of N+ and P+ Polysilicon in Dual-Gate CMOS Process", Int'l Electron Devices Meeting, Dec. 11-14, '88, pp. 238-241.
Research Disclosure, No. 286, Feb., 1988, p. 108.
Kunio, "MIS Type Field-Effect Transistor", Patent Abstracts of Japan, Aug. 14, 1985.
Muller & Kamins "Device Electronics for Integrated Circuits" .COPYRGT.1985 pp. 399-405, 490-493.
Glasser et al., "The Design and Analysis of VLSI Circuits" .COPYRGT.1986 pp. 76-90.
Doyle Brian S.
Fishbein Bruce J.
Digital Equipment Corporation
Jackson Jerome
Monin, Jr. Donald L.
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