Semiconductor device with reduced stress applied to gate electro

Details Semiconductor device with reduced stress applied to gate electro Semiconductor device with reduced stress applied to gate electro

1994-06-21

1995-09-05

Saadat, Mahshid D.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257327, 257388, 257412, 257633, H01L 2980, H01L 2984, H01L 2904

Patent

active

054480965

ABSTRACT:
In a semiconductor device having a gate electrode and an insulating film covering the gate electrode on a compound semiconductor substrate, the stress in the gate metal and the stress produced by the insulating film on the gate electrode cancel so that threshold voltage is not a function of gate orientation relative to the crystalline directions of the substrate.

REFERENCES:
patent: 3856647 (1974-12-01), Blachman
patent: 4777517 (1988-10-01), Onodera et al.
patent: 4791471 (1988-12-01), Onodera et al.
patent: 5023676 (1991-06-01), Tatsuta
Kohno et al, "Piezoelectric Effect On Electrical Asymmetry In GaAs LDD SAGFETs", 13th State-of-the-Art Program on Compound Semiconductors, 1991, pp. 97-105.
Asbeck et al, "Piezoelectric Effects In GaAs FET's And Their Role In Orientation-Dependent Device Characteristics", IEEE Transactions on Electron Devices, vol. ED-31, No. 10, Oct. 1984, pp. 1377-1380.
Onodera et al, "Improvement In GaAs MESFET Performance Due To Piezoelectric Effect", IEEE Transactions on Electron Devices, vol. ED-32, No. 11, Nov. 1983, pp. 2314-2318.
Schnell et al, "Compensating Piezoelectric Effect Of Gate Metal And Dielectric Overlayer Stresses On GaAs MESFETs", Japanese Journal of Applied Physics, vol. 26, No. 10, Oct. 1987, pp. L1583-L1586.
Enoki et al, "0.3-.mu.m Advanced SAINT FET's Having Asymmetric n+-Layers For Ultra-High-Frequency GaAs MMIC's", IEEE, 1987, pp. 18-21.

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