Semiconductor device with reduced standby failures

Details Semiconductor device with reduced standby failures Semiconductor device with reduced standby failures

2008-09-23

2010-11-23

Le, Thong Q (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S229000, C365S226000, C365S241000, C365S191000, C365S189080

Reexamination Certificate

active

07839717

ABSTRACT:
A semiconductor memory device includes a cell core storing data, a plurality of peripheral circuit components, collectively driving data to/from the cell core and providing a default state at an output signal state during an initialization process upon power-up, and an initialization circuit detecting a standby mode of operation for the semiconductor memory device, and upon detecting the standby mode controlling operation of the plurality of peripheral circuit components to provide the default state as the signal state during standby mode.

REFERENCES:
patent: 5638330 (1997-06-01), Confalonieri et al.
patent: 2008/0045166 (2008-02-01), Koch et al.
patent: 2002133878 (2002-05-01), None
patent: 100634455 (2006-10-01), None
patent: 100648289 (2006-11-01), None
patent: 100706816 (2007-04-01), None

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