Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-11-02
2002-02-19
Picardat, Kevin M. (Department: 2822)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S637000, C438S622000, C438S672000
Reexamination Certificate
active
06348408
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and a method of forming the same, and more particularly to a semiconductor device with a reduced number of intermediate level interconnection patterns and a method of forming the same with a reduced number of processes.
The number of semiconductor devices integrated on a semiconductor integrated circuit chip has been on the increase of about four times per three years. An advanced semiconductor memory device has an integration of more than one hundred million of the semiconductor devices. Such the ultra large scale integrated circuit having the integration of a large number of the semiconductor devices also has a large number of interconnections which inter-connect the semiconductor devices. The ultra large scale integrated circuit has a multilevel interconnection structure, wherein the number of levels of the interconnection layers has been on the increase, for example, up to not less than five levels. In order to increase the density of integration of the large scale integrated circuits, it is necessary to form fine interconnections inter-connecting the individual semiconductor devices and fine contacts connecting the different level interconnections. In addition, it is essential that the multilevel interconnection structure is suitable for increasing the degree of the integration and is formed by an appropriate fabrication method. Usually, the integrated circuit having the multilevel interconnection structure may be fabricated as follows. A first level inter-layer insulator is formed on a semiconductor substrate having semiconductor devices. First level contact holes are formed in the first level inter-layer insulator, so that the first level contact holes reach the semiconductor devices. Conductive layers are filled into the first level contact holes so that first level contact plugs reaching the semiconductor devices are formed in the first level contact holes. First level interconnection layers are formed which extend over the top surface of the first level inter-layer insulator, so that the first level interconnection layers are in contact with top portions of the first level contact plugs in the first level contact holes, whereby the first level interconnection layers are connected through the first level contact plugs to the semiconductor devices on the top surface of the semiconductor substrate. As a result, a first level interconnection structure is completed. In order to form the multilevel interconnection structure, it is necessary to form second, third and further level interconnection structures over the first level interconnection structure in the same manners as described above. Namely, a second level inter-layer insulator is formed on the first level interconnection layers and the first level inter-layer insulator. Second level contact holes are formed in the second level inter-layer insulator, so that the second level contact holes reach the first level interconnection layers. Conductive layers are filled into the second level contact holes so that second level contact plugs reaching the first level interconnection layers are formed in the second level contact holes. Second level interconnection layers are formed which extend over the top surface of the second level inter-layer insulator, so that the second level interconnection layers are in contact with top portions of the second level contact plugs in the second level contact holes, whereby the second level interconnection layers are connected through the second level contact plugs to the first level interconnection layers. As a result, a second level interconnection structure is completed. Further, a third level inter-layer insulator is formed on the second level interconnection layers and the second level inter-layer insulator. Third level contact holes are formed in the third level inter-layer insulator, so that the third level contact holes reach the second level interconnection layers. Conductive layers are filled into the third level contact holes so that third level contact plugs reaching the second level interconnection layers are formed in the third level contact holes. Third level interconnection layers are formed which extend over the top surface of the third level inter-layer insulator, so that the third level interconnection layers are in contact with top portions of the third level contact plugs in the third level contact holes, whereby the third level interconnection layers are connected through the third level contact plugs to the second level interconnection layers. As a result, a third level interconnection structure is completed. Similarly, fourth, fifth and higher level interconnection structures are formed in the same manners. Electrodes are formed on a top inter-layer insulator, so that the electrodes are in contact with the top contact plugs formed in the top contact holes formed in the top inter-layer insulator, whereby the electrodes arc connected through the top contact plugs to the top interconnection layers.
In accordance with the above described first conventional multilevel interconnection structure, the semiconductor devices are connected through all of the multilevel interconnection structures to the electrodes. Namely, the semiconductor devices are connected through all levels of the interconnection layers and the contact plugs to the electrodes, independently from the issue of whether or not it is necessary that the semiconductor devices are connected to any of the intermediate level interconnection layers other than the top level interconnection structures. This means that at least some of the intermediate level interconnection layers are formed for the propose only of indirectly contributing to connect the semiconductor devices on the semiconductor substrate to the electrodes on the top inter-layer insulator, whereby the number of the intermediate level interconnection layers is increased and thereby making it difficult to further increase the density of integration of the integrated circuit having the multilevel interconnection structure.
In order to solve the above problems, a second conventional multilevel interconnection structure was proposed, wherein multilevel contact plugs are connected with each other without intervening the intermediate level interconnection layers. This second conventional multilevel interconnection structure is disclosed in Japanese laid-open patent publication No. 62-130542.
FIG. 1
is a fragmentary cross sectional elevation view illustrative of the second conventional multilevel interconnection structure of the integrated circuit. A first level interconnection layer
101
is formed which extends on a top surface of a silicon substrate
100
. A first level inter-layer insulator
102
made of phospho-silicate-glass is entirely formed over the first level interconnection layer
101
and the silicon substrate
100
, so that the first level inter-layer insulator
102
covers the first level interconnection layer
101
. First level through holes are formed in the first level inter-layer insulator
102
, so that the first level through holes reach the first level interconnection layer
101
. A conductive metal is filled into the first level through holes to form first level metal contact plugs
103
in the first level through holes in the first level inter-layer insulator
102
, so that the first level metal contact plugs
103
are in contact with the first level interconnection layer
101
. A second level interconnection layer
105
is formed which extends on a top surface of the first level inter-layer insulator
102
, so that the second level interconnection layer
105
is in contact with the tops of some of the first level metal contact plugs
103
. A second level inter-layer insulator
104
made of phospho-silicate-glass is entirely formed over the second level interconnection layer
105
and the top surface of the first level inter-layer insulator
102
, so that the second level inter-layer insulator
104
covers the second level interconnection layer
105
NEC Corporation
Picardat Kevin M.
Young & Thompson
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