Semiconductor device with peripheral trench

Details Semiconductor device with peripheral trench Semiconductor device with peripheral trench

2007-06-12

2007-06-12

Soward, Ida M. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S301000, C257S302000, C257S303000, C257S304000, C257S305000, C257S328000, C257S329000, C257S330000, C257S331000, C257S332000, C257S333000, C257S334000, C257S401000, C257S908000

Reexamination Certificate

active

10929727

ABSTRACT:
Conventional power MOSFETs enables prevention of an inversion in a surrounding region surrounding the outer periphery of an element region by a wide annular layer and a wide sealed metal. Since, resultantly, the area of the surrounding region is large, increase in the element region has been restrained. A semiconductor device is hereby provided which has an inversion prevention region containing an MIS (MOS) structure. The width of polysilicon for the inversion prevention region is large enough to prevent an inversion since the area of an oxide film can be increased by the depth of the trench. By this, leakage current can be reduced even though the area of the region surrounding the outer periphery of the element region is not enlarged. In addition, since the element region is enlarged, on-state resistance of the MOSFET can be reduced.

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