Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1997-08-14
1999-08-17
Trinh, Michael
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438229, 438653, 438528, H01L 213205
Patent
active
059407255
ABSTRACT:
A semiconductor device comprises a semiconductor substrate of a first conductivity type, a first conductive layer formed in the semiconductor substrate using a dopant, and being of a second conductivity type, a silicon-rich nitride film formed on the first conductive layer, and a second conductive layer formed on the silicon-rich nitride film, wherein the silicon-rich nitride film inhibits outdiffusion of dopant from the first conductive layer into the second conductive layer, and blocks interdiffusion between the second conductive layer and the first conductive layer.
REFERENCES:
patent: 4016007 (1977-04-01), Wada et al.
patent: 4180596 (1979-12-01), Crowder et al.
patent: 4470189 (1984-09-01), Roberts et al.
patent: 4558338 (1985-12-01), Sakata
patent: 4584760 (1986-04-01), Okazawa
patent: 4609903 (1986-09-01), Toyokura et al.
patent: 4640004 (1987-02-01), Thomas et al.
patent: 4656729 (1987-04-01), Kroll et al.
patent: 4682407 (1987-07-01), Wilson et al.
patent: 4688078 (1987-08-01), Hseih
patent: 4789560 (1988-12-01), Yen
patent: 4897368 (1990-01-01), Kobushi et al.
patent: 4900590 (1990-02-01), Tamura
patent: 5023679 (1991-06-01), Shibata
patent: 5041361 (1991-08-01), Tsuo
patent: 5103285 (1992-04-01), Furumura et al.
patent: 5147820 (1992-09-01), Chittipeddi et al.
patent: 5218232 (1993-06-01), Yuzurihara et al.
patent: 5364804 (1994-11-01), Ho et al.
patent: 5488246 (1996-01-01), Hayashide et al.
patent: 5518960 (1996-05-01), Tsuchimoto
patent: 5668028 (1997-09-01), Bryant
H.H. Chao, et al., IBM Technical Disclosure Bulletin, vol. 27, No. 11, Apr. 1985, pp. 6652-6655.
Applied Physics Letters, vol. 59, No. 21, Nov. 18, 1991, New York U.S. pp. 2742-2744.
D. Bolmont Et Al. "Room-temperature Si.sub.3 N.sub.4 and Ge.sub.3 N.sub.4 growths by Si and Ge surface irradiation with N.sub.2 electron cyclotron resonance plasma" *abstract; figure 3; table 1*.
Journal of Vacuum Science and Technology; Part A, vol. 5, No. 4, Aug. 1987, New York, U.S. pp. 1793-1794, M. Kitabatake ET K. Wasa "Hydrogen-free SiN films prepared by ion-beam sputter deposition".
Hunter Thomas
Morton Joseph M.
Shore Susan Eileen
Yu Anthony J.
International Business Machines - Corporation
Mortinger Alison D.
Trinh Michael
LandOfFree
Semiconductor device with non-deposited barrier layer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device with non-deposited barrier layer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device with non-deposited barrier layer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-325183