Semiconductor device with multi-layer interconnection

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S754000, C257S755000

Reexamination Certificate

active

06555887

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a fabrication method thereof. More particularly, the present invention relates to a semiconductor device having a multilayer interconnection structure including a polycrystalline silicon film and a refractory metal silicide film, and a method of fabricating such a semiconductor device.
2. Description of the Background Art
Conventional gate electrode interconnections and also contact interconnections for connection with a gate electrode or for contact with a substrate are formed of a single layer interconnection constituted by a polycrystalline silicon film doped with impurities such as phosphorous (P), arsenic (As) and boron (B). This is because a polycrystalline silicon film having a high melting point is impervious to the thermal treatment of high temperature carried out after formation of the gate electrode. Also, a refractory metal silicide film of low resistance and high melting point is a possible consideration to meet the requirement of a material of low resistance in accordance with increase of the integration density in the recent semiconductor devices. However, the usage of a unitary refractory metal silicide film is disadvantageous in that the workability is inferior under the existing circumstances. At the present stage, a refractory metal silicide film and a polycrystalline silicon film are layered to form a double layered structure of a polycrystalline silicon film/refractory metal silicide film, used as the gate electrode interconnection or the contact interconnection. The requirement of low resistance and high melting point is satisfied in this way.
The interconnection of a double layered interconnection structure of a polycrystalline silicon film/refractory metal silicide film conventionally used will be described hereinafter with reference to
FIGS. 15-17
.
First, a method of fabricating a conventional semiconductor device will be described. Referring to
FIG. 15
, an isolation oxide film
102
is formed on an n type silicon substrate
101
by the LOCOS (Local Oxidation of Silicon) method. Next, a silicon oxide film
103
of 100 Å in film thickness functioning as a gate insulation film is formed at an element formation region by thermal oxidation. Then, a polycrystalline silicon film
104
of 700 Å in thickness is formed on silicon oxide film
103
using a tubular type reduced pressure CVD (Chemical Vapor Deposition) apparatus under the condition of 575° C. for the film growth temperature and 0.2 Torr for the deposition pressure with PH
3
as the dopant, so that the concentration of impurity added P becomes 6×10
20
atms/cm
3
. Then, a tungsten silicide film
105
of 700 Å in thickness is formed on polycrystalline silicon film
104
using a single wafer CVD apparatus under the condition of 550° C. for the film growth temperature and 1.2 Torr for the deposition pressure, resulting in the state shown in
FIG. 16. A
gate electrode
145
of a MOS transistor is formed using lithography and dry etching. Then, gate electrode
145
is covered with an interlayer oxide film
106
, resulting in the state shown in FIG.
17
.
When an interconnection of a double layered structure of polycrystalline silicon film
104
/tungsten silicide film
105
formed as described-above is used, the P impurities doped into polycrystalline silicon film
104
will diffuse into tungsten silicide film
105
during the thermal treatment. This means that a depletion layer will be formed in proximity to the junction plane of polycrystalline silicon film
104
/tungsten silicide film
105
when an interconnection of the double layered structure of polycrystalline silicon film
104
/tungsten silicide film
105
is used for the gate electrode. This depletion layer will function as the resistance to the current flowing from the interconnection to the gate electrode when an electric field is applied to the gate electrode. The property of the transistor will be adversely affected.
A depletion layer will be formed in proximity to the junction plane of the polycrystalline silicon film/refractory metal silicide film to affect the contact resistance when the interconnection of the double layered structure of the polycrystalline silicon film/refractory metal silicide film is used for the contact of a silicon substrate and another electrode interconnection and for the contact of the interconnection of the polycrystalline silicon film/refractory metal silicide film of a double layered structure.
Japanese Patent Laying-Open Nos. 5-315333, 3-6821, and 8-264786 disclose the technique to solve the above problem. These techniques include the improvement of subjecting the refractory metal silicide film to ion implantation such as P which is the impurity of the conductivity type identical to that of the polycrystalline silicon film, or depositing a refractory metal silicide film doped with P in advance. By suppressing diffusion of the impurity from the polycrystalline silicon film to the refractory metal silicide film, formation of a depletion layer in proximity to the junction between the polycrystalline silicon film and the refractory metal silicide film can be reduced. As a result, degradation in the transistor property of the gate electrode is suppressed.
The technique disclosed in the aforementioned publications of suppressing formation of a depletion layer located around the contact plane with the polycrystalline silicon film by introducing impurities into the refractory metal silicide had the following problem. Considering gate electrode
145
shown in
FIG. 17
as an example, the effect of impurity implantation is low, i.e., the effect of suppressing formation of a depletion layer in proximity to the interface between polycrystalline silicon film
104
and refractory metal silicide film
105
is low if the impurity concentration is lower than a predetermined value. As a result, the transistor property is degraded. When the impurity concentration is higher than a predetermined value, peel off occurs at the interface between interlayer oxide film
106
and refractory metal silicide film
105
.
SUMMARY OF THE INVENTION
In view of the foregoing, an object of the present invention is to provide a semiconductor device of a multilayer interconnection structure capable of preventing generation of peel off at the interface between a refractory metal silicide film and an interlayer oxide film while maintaining the effect of preventing formation of a depletion layer at the junction plane for a polycide interconnection, and a method of fabricating such a semiconductor device.
According to an aspect of the present invention, a semiconductor device includes a silicon-containing film formed on a semiconductor substrate, and having a first impurity, a refractory metal silicide film formed on the silicon-containing film, and having a second impurity of a conductivity type identical to that of the first impurity, and an insulation film formed on the refractory metal silicide film. The concentration of the second impurity in proximity to the interface between the insulation film and the refractory metal silicide film is set to the range of 5×10
19
atms/cm
3
-2×10
22
atms/cm
3
.
In the semiconductor device of the present invention, the silicon-containing film preferably includes a polycrystalline silicon film.
In the semiconductor device of the present invention, the second impurity preferably includes one or more materials selected from the group consisting of P, As, B and BF
2
.
In the semiconductor device of the present invention, the refractory metal silicide film further preferably includes a tungsten silicide film, a cobalt silicide film or a titanium silicide film.
In the semiconductor device of the present invention, the insulation film preferably includes a silicon oxide film.
In the semiconductor device of the present invention, the silicon-containing film and the refractory metal silicide film can form the gate electrode of an electric field transistor.
In the semic

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