Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1998-07-07
2002-07-09
Williams, Alexander O. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S616000, C257S534000, C257S295000, C257S301000, C257S190000, C257S068000, C257S296000, C257S308000, C361S313000, C438S309000
Reexamination Certificate
active
06417536
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to a semiconductor device with a semiconductor body provided with a memory capacitor having a lower electrode comprising a layer of semiconductor material with a rough surface formed by hemispherical grains of said semiconductor material, on which a dielectric layer and an upper electrode are provided. The invention also relates to a method of manufacturing such a device.
The semiconductor device is, for example, a DRAM (Dynamic Random Access Memory). It is of essential importance in such memories that a memory capacitor should occupy no more than a very small portion of the surface area of the semiconductor body. In practice, a surface area of approximately 1.5 &mgr;m
2
, for example, is available for each memory cell in a 64 Mbit memory of this kind, and approximately 1 &mgr;m
2
for the memory capacitor present in each cell. To form a memory capacitor having as high a capacitance as is possible on such a small surface area, this capacitor is at least partly formed transversely to the surface of the semiconductor body in practice. The capacitor thus becomes larger, while it does not occupy any additional space as seen in projection on the surface of the semiconductor body. The memory capacitor is formed, for example, in a groove or on a mesa (node). Furthermore, the capacitance value is increased in that the lower electrode is given a rough surface. An important increase is obtained in that the lower electrode of the memory capacitor is formed in a layer of semiconductor material having a rough surface formed by hemispherical grains of the relevant semiconductor material. The dielectric layer may be a layer of silicon oxide, but in practice a dielectric layer is often used comprising a dual layer of silicon oxide and silicon nitride. The upper electrode is usually made of polycrystalline silicon.
A device of the kind mentioned in the opening paragraph is known from “Hemispherical Grain Silicon for High Density DRAMs” by H. Watanabe et al., Solid State Technology, July 1992, pp. 29-33, wherein the lower electrode is formed in a layer of silicon. Two methods are described in this article for forming a layer with a hemispherical grain silicon surface. In the first method, the layer is directly formed through deposition by means of a usual LPCVD (Low Pressure Chemical Vapor Deposition) process from a gas mixture comprising silane and helium. In the second method, a layer of amorphous silicon is first deposited by means of this same LPCVD process, whereupon this layer is converted by heating into a layer having a surface consisting of hemispherical grains.
It is found in the first method that the temperature at which the desired granular layer is formed is highly critical. The desired layer is formed at a temperature of 590° C., but it is not at temperatures of 580° C. and lower or 600° C. and higher. In the second method, the temperature at which the heating must take place is less critical, but here equipment is required which renders possible heating under high vacuum at a pressure of approximately 10
−7
torr. Both methods are not very suitable for use in practice, the first method because the temperature at which the deposition is to take place is critical, the second method because very costly vacuum equipment is required for it.
SUMMARY OF THE INVENTION
The invention has for its object to provide a semiconductor device of the kind mentioned in the opening paragraph which can be manufactured in a simpler manner. According to the invention, this semiconductor device is for this purpose characterized in that the semiconductor material from which the lower electrode is manufactured is Si
1−x
Ge
x
, with 0.2<x<1.
Such a semiconductor device can be manufactured in a simple manner because a layer of Si
1−x
Ge
x
with a rough surface formed by hemispherical grains of this material can be directly formed simply by deposition by means of usual CVD (Chemical Vapor Deposition) processes from gas mixtures which comprise usual silicon and germanium compounds such as, for example, SiH
4
or SiH
2
Cl
2
and GeH
4
. These processes may be carried out both at atmospheric pressure and at reduced pressure. The temperature at which these processes are to be carried out is not very critical. The semiconductor body is preferably heated to a temperature of between 450° C. and 700° C. A layer is deposited in this manner having the d desired rough surface formed by hemispherical grains of the material, w which grains have diameters from 30 to 150 nm. A deposition process is then obtained at the same time by which the layer of Si
1−x
Ge
x
is deposited at a practical deposition rate of 1 to 10 nm per minute. To obtain the desired small grains of between 30 and 150 nm diameter, layers with x<0.2 have to be deposited at undesirably high temperatures of more than 700° C., with x=0.1 even up to 850° C.
In a preferred embodiment of the semiconductor device according to the invention, the lower electrode is formed on a conductor of polycrystalline silicon which lies on a layer of insulating material. A layer of Si
1−x
Ge
x
with 0.2<x<1 can be deposited very selectively on polycrystalline silicon. In practice, Cl is added to the gas mixture from which the layer is deposited in that case. Mixtures are then used comprising SiH
4
, GeH
4
, and HCl or SiH
2
Cl
2
and GeH
4
. After the conductor of polycrystalline silicon has been formed, for example in the form of a mesa (node), a lower electrode having a rough surface may then be formed in a self-aligned manner on this conductor for the formation of a memory capacitor. No material is deposited on the layer of insulating material during this.
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“Hemispherical Grain Silicon for High Density DRAMs”, by Watanabe et al, Solid State Technology, Jul. 1992, pp. 29-33.
De Boer Wiebe B.
Martens Marieke C.
Biren Steven R.
Koninklijke Philips Electronics , N.V.
Williams Alexander O.
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