Semiconductor device with memory and method for memory test

Details Semiconductor device with memory and method for memory test Semiconductor device with memory and method for memory test

2008-07-08

2008-07-08

Britt, Cynthia (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S777000, C714S764000

Reexamination Certificate

active

07398439

ABSTRACT:
A semiconductor device is disclosed which includes a data memory which stores data and a code memory which stores an ECC code corresponding to the data. The semiconductor device includes an ECC unit which outputs, to the data memory as the data, a test pattern required to test the data memory, and which generates, from the test pattern, code information having an error checking function, and outputs the code information to the code memory as the ECC code.

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P. Ramanathan, et al., IEEE VLSI Test Symposium, pp. 292-297, “Zero Cost Testing of Check Bits in RAMs With On-Chip ECC”, Apr. 7-9, 1992.
Kiyohiro Furutani, et al., “A Built-in Hamming Code ECC Circuit for Dram's”, IEEE Journal of Solid-State Circuits, vol. 24, No. 1, Feb. 1989, pp. 50-56.

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