Semiconductor device with loop line pattern structure,...

Details Semiconductor device with loop line pattern structure,... Semiconductor device with loop line pattern structure,...

2006-08-08

2006-08-08

Owens, Douglas W. (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S390000

Reexamination Certificate

active

07087947

ABSTRACT:
An alternating phase shift mask with dark loops thereon, a memory array fabricated with the alternating phase shift mask, and a method of fabricating the memory. The dark loops in the mask always separate first regions with 180° phase difference from second regions with 0° phase difference to define active areas or gate-lines in a DRAM chip. By using the alternating phase shift mask to pattern gate-lines or active areas in a DRAM array, no unwanted image is created in the DRAM array and only one exposure is needed to achieve high resolution requirement.

REFERENCES:
patent: 5418092 (1995-05-01), Okamoto
patent: 5538833 (1996-07-01), Ferguson et al.
patent: 2001/0055733 (2001-12-01), Irie et al.
patent: 2002/0102478 (2002-08-01), Hasegawa et al.
patent: 2002/0109194 (2002-08-01), Ishizuka
patent: 2002/0196629 (2002-12-01), Terashi
patent: 11017146 (1999-01-01), None

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